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| author | Srinath Parvathaneni <srinath.parvathaneni@arm.com> | 2024-07-08 16:36:42 +0100 |
|---|---|---|
| committer | Richard Earnshaw <rearnsha@arm.com> | 2024-07-12 15:40:48 +0100 |
| commit | 6ab366f2643d13507e53e85684dc5b5a5e14b54b (patch) | |
| tree | 09a78622f1825b484ab1c20d816d5702f7681241 /include/opcode/aarch64.h | |
| parent | 9858d3031e5e79fc4b3ec2793f3e1aca569afd6f (diff) | |
| download | binutils-6ab366f2643d13507e53e85684dc5b5a5e14b54b.zip binutils-6ab366f2643d13507e53e85684dc5b5a5e14b54b.tar.gz binutils-6ab366f2643d13507e53e85684dc5b5a5e14b54b.tar.bz2 | |
aarch64: Add support for sme2.1 movaz instructions.
This patch adds support for following sme2.1 movaz instructions and
the spec is available here [1].
1. MOVAZ (array to vector, two registers).
2. MOVAZ (array to vector, four registers).
3. MOVAZ (tile to vector, single).
[1]: https://developer.arm.com/documentation/ddi0602/2024-03/SME-Instructions?lang=en
Diffstat (limited to 'include/opcode/aarch64.h')
| -rw-r--r-- | include/opcode/aarch64.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h index 64959a8..5a2b99d 100644 --- a/include/opcode/aarch64.h +++ b/include/opcode/aarch64.h @@ -789,6 +789,7 @@ enum aarch64_opnd AARCH64_OPND_SME_ZA_array_vrsh_2, /* Tile to vector, four registers (H). */ AARCH64_OPND_SME_ZA_array_vrss_2, /* Tile to vector, four registers (S). */ AARCH64_OPND_SME_ZA_array_vrsd_2, /* Tile to vector, four registers (D). */ + AARCH64_OPND_SME_ZA_ARRAY4, /* Tile to vector, single (BHSDQ). */ AARCH64_OPND_SVE_Za_5, /* SVE vector register in Za, bits [9,5]. */ AARCH64_OPND_SVE_Za_16, /* SVE vector register in Za, bits [20,16]. */ AARCH64_OPND_SVE_Zd, /* SVE vector register in Zd. */ |