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author | Nelson Chu <nelson.chu@sifive.com> | 2020-02-12 02:18:50 -0800 |
---|---|---|
committer | Jim Wilson <jimw@sifive.com> | 2020-02-20 16:49:09 -0800 |
commit | 2ca89224b1ce2cf170bb891b211bede4f6eda473 (patch) | |
tree | 084816dc38df12ac10a6d561c81aa2e6cc9f80f3 /gas/config/tc-riscv.c | |
parent | bd0cf5a6bae180f65f3b9298619d1bd695abcdd8 (diff) | |
download | binutils-2ca89224b1ce2cf170bb891b211bede4f6eda473.zip binutils-2ca89224b1ce2cf170bb891b211bede4f6eda473.tar.gz binutils-2ca89224b1ce2cf170bb891b211bede4f6eda473.tar.bz2 |
RISC-V: Disable the CSR checking by default.
Add new .option `csr-check/no-csr-check` and GAS option `-mcsr-check
/-mno-csr-check` to enbale/disable the CSR checking. Disable the CSR
checking by default.
gas/
* config/tc-riscv.c: Add new .option and GAS options to enbale/disable
the CSR checking. We disable the CSR checking by default.
(reg_lookup_internal): Check the `riscv_opts.csr_check`
before we doing the CSR checking.
* doc/c-riscv.texi: Add description for the new .option and assembler
options.
* testsuite/gas/riscv/priv-reg-fail-fext.d: Add `-mcsr-check` to enable
the CSR checking.
* testsuite/gas/riscv/priv-reg-fail-rv32-only.d: Likewise.
Diffstat (limited to 'gas/config/tc-riscv.c')
-rw-r--r-- | gas/config/tc-riscv.c | 22 |
1 files changed, 21 insertions, 1 deletions
diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c index 2f95d41..5972f02 100644 --- a/gas/config/tc-riscv.c +++ b/gas/config/tc-riscv.c @@ -83,6 +83,7 @@ struct riscv_set_options int rve; /* Generate RVE code. */ int relax; /* Emit relocs the linker is allowed to relax. */ int arch_attr; /* Emit arch attribute. */ + int csr_check; /* Enable the CSR checking. */ }; static struct riscv_set_options riscv_opts = @@ -92,6 +93,7 @@ static struct riscv_set_options riscv_opts = 0, /* rve */ 1, /* relax */ DEFAULT_RISCV_ATTR, /* arch_attr */ + 0. /* csr_check */ }; static void @@ -572,7 +574,9 @@ reg_lookup_internal (const char *s, enum reg_class class) if (riscv_opts.rve && class == RCLASS_GPR && DECODE_REG_NUM (r) > 15) return -1; - if (class == RCLASS_CSR && !reg_csr_lookup_internal (s)) + if (class == RCLASS_CSR + && riscv_opts.csr_check + && !reg_csr_lookup_internal (s)) return -1; return DECODE_REG_NUM (r); @@ -2272,6 +2276,8 @@ enum options OPTION_NO_RELAX, OPTION_ARCH_ATTR, OPTION_NO_ARCH_ATTR, + OPTION_CSR_CHECK, + OPTION_NO_CSR_CHECK, OPTION_END_OF_ENUM }; @@ -2286,6 +2292,8 @@ struct option md_longopts[] = {"mno-relax", no_argument, NULL, OPTION_NO_RELAX}, {"march-attr", no_argument, NULL, OPTION_ARCH_ATTR}, {"mno-arch-attr", no_argument, NULL, OPTION_NO_ARCH_ATTR}, + {"mcsr-check", no_argument, NULL, OPTION_CSR_CHECK}, + {"mno-csr-check", no_argument, NULL, OPTION_NO_CSR_CHECK}, {NULL, no_argument, NULL, 0} }; @@ -2364,6 +2372,14 @@ md_parse_option (int c, const char *arg) riscv_opts.arch_attr = FALSE; break; + case OPTION_CSR_CHECK: + riscv_opts.csr_check = TRUE; + break; + + case OPTION_NO_CSR_CHECK: + riscv_opts.csr_check = FALSE; + break; + default: return 0; } @@ -2756,6 +2772,10 @@ s_riscv_option (int x ATTRIBUTE_UNUSED) riscv_opts.relax = TRUE; else if (strcmp (name, "norelax") == 0) riscv_opts.relax = FALSE; + else if (strcmp (name, "csr-check") == 0) + riscv_opts.csr_check = TRUE; + else if (strcmp (name, "no-csr-check") == 0) + riscv_opts.csr_check = FALSE; else if (strcmp (name, "push") == 0) { struct riscv_option_stack *s; |