| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2022-12-07 | zicntr: separate cycle/instret accessibility test (#439) | Chih-Min Chao | 1 | -6/+7 |
| 2022-06-09 | Test misaligned stores. (#397) | Tim Newsome | 1 | -0/+3 |
| 2022-06-07 | Test misaligned loads. | Tim Newsome | 1 | -0/+3 |
| 2020-11-20 | Only attempt to build tests supported by compiler | Andrew Waterman | 1 | -2/+0 |
| 2018-01-02 | Test access exception behavior for illegal addresses (#111) | Andrew Waterman | 1 | -0/+1 |
| 2017-04-07 | Remove defunct IPI tests | Andrew Waterman | 1 | -3/+0 |
| 2016-07-22 | Move dirty bit test to rv64si directory | Andrew Waterman | 1 | -1/+0 |
| 2016-06-08 | Add HW breakpoint test | Andrew Waterman | 1 | -0/+1 |
| 2016-05-02 | Remove incorrect M-mode WFI test | Andrew Waterman | 1 | -1/+0 |
| 2016-04-30 | ERET -> xRET; new memory map | Andrew Waterman | 1 | -3/+1 |
| 2015-05-19 | Add basic WFI test | Andrew Waterman | 1 | -0/+1 |
| 2015-05-09 | Update to privileged architecture version 1.7 | Andrew Waterman | 1 | -0/+1 |
| 2015-03-25 | split out S-mode tests and M-mode tests | Yunsup Lee | 1 | -0/+21 |
 |
index : rocket-tools/riscv-tests.git | |
| Unnamed repository; edit this file 'description' to name the repository. | root |
| aboutsummaryrefslogtreecommitdiff |