aboutsummaryrefslogtreecommitdiff
path: root/debug/targets/RISC-V/spike32.py
diff options
context:
space:
mode:
Diffstat (limited to 'debug/targets/RISC-V/spike32.py')
-rw-r--r--debug/targets/RISC-V/spike32.py2
1 files changed, 1 insertions, 1 deletions
diff --git a/debug/targets/RISC-V/spike32.py b/debug/targets/RISC-V/spike32.py
index 17d28fb..0d67ebd 100644
--- a/debug/targets/RISC-V/spike32.py
+++ b/debug/targets/RISC-V/spike32.py
@@ -3,7 +3,7 @@ import testlib
class spike32_hart(targets.Hart):
xlen = 32
- ram = 0x10000000
+ ram = 0x10100000
ram_size = 0x10000000
bad_address = ram - 8
instruction_hardware_breakpoint_count = 4