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authorTim Newsome <tim@sifive.com>2022-06-02 11:06:03 -0700
committerTim Newsome <tim@sifive.com>2022-06-07 10:12:59 -0700
commitafef86516d1ec7289bae24e3ad247cca57e3fb3b (patch)
treef3511f723e1ddf524f193a4ca67d7c809d14d1ed /isa
parent27dbc399e23d5f9668363706accc76911d6d31fc (diff)
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Set TESTNUM before executing code.
Tests that might cause a trap during their code need TESTNUM (gp) set so the trap handler can correctly identify which test is running, and also report that to the user in case the test fails. Fix up shamt.S and csr.S to handle the new behavior.
Diffstat (limited to 'isa')
-rw-r--r--isa/macros/scalar/test_macros.h2
-rw-r--r--isa/rv32mi/shamt.S3
-rw-r--r--isa/rv64si/csr.S5
3 files changed, 4 insertions, 6 deletions
diff --git a/isa/macros/scalar/test_macros.h b/isa/macros/scalar/test_macros.h
index a8a78a7..ee352e4 100644
--- a/isa/macros/scalar/test_macros.h
+++ b/isa/macros/scalar/test_macros.h
@@ -12,9 +12,9 @@
#define TEST_CASE( testnum, testreg, correctval, code... ) \
test_ ## testnum: \
+ li TESTNUM, testnum; \
code; \
li x7, MASK_XLEN(correctval); \
- li TESTNUM, testnum; \
bne testreg, x7, fail;
# We use a macro hack to simpify code generation for various numbers
diff --git a/isa/rv32mi/shamt.S b/isa/rv32mi/shamt.S
index c4d154c..89a07ee 100644
--- a/isa/rv32mi/shamt.S
+++ b/isa/rv32mi/shamt.S
@@ -25,8 +25,7 @@ RVTEST_CODE_BEGIN
.global mtvec_handler
mtvec_handler:
# Trapping on test 3 is good.
- # Note that since the test didn't complete, TESTNUM is smaller by 1.
- li t0, 2
+ li t0, 3
bne TESTNUM, t0, fail
# Make sure CAUSE indicates an illegal instructino.
diff --git a/isa/rv64si/csr.S b/isa/rv64si/csr.S
index 0ba1e1f..1b03f4a 100644
--- a/isa/rv64si/csr.S
+++ b/isa/rv64si/csr.S
@@ -142,10 +142,9 @@ finish:
.global stvec_handler
stvec_handler:
# Trapping on tests 13-15 is good news.
- # Note that since the test didn't complete, TESTNUM is smaller by 1.
- li t0, 12
+ li t0, 13
bltu TESTNUM, t0, 1f
- li t0, 14
+ li t0, 15
bleu TESTNUM, t0, privileged
1: