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| author | Palmer Dabbelt <palmer.dabbelt@eecs.berkeley.edu> | 2016-01-29 11:33:40 -0800 |
|---|---|---|
| committer | Palmer Dabbelt <palmer.dabbelt@eecs.berkeley.edu> | 2016-01-29 11:33:40 -0800 |
| commit | 210c0e6e363026e0de03e7f7bc61612b9cd44533 (patch) | |
| tree | 99d56564c284d95a3a096967a371f9149e98006a /isa | |
| parent | fc000796c11f84a5e1997c67fcfac751aa64a916 (diff) | |
| download | riscv-tests-210c0e6e363026e0de03e7f7bc61612b9cd44533.zip riscv-tests-210c0e6e363026e0de03e7f7bc61612b9cd44533.tar.gz riscv-tests-210c0e6e363026e0de03e7f7bc61612b9cd44533.tar.bz2 | |
Check NAN values in fdiv tests
The new RISC-V ISA spec mandates NAN bit patterns. This test checks to make
sure that those bit patterns come out of fsqrt(-1). These pass on both spike
and Rocket.
An additional _DWORD_RESULT version of the FP test macros is added to
facilitate floating-point tests that compare against particular bit patterns.
Diffstat (limited to 'isa')
| -rw-r--r-- | isa/macros/scalar/test_macros.h | 8 | ||||
| -rw-r--r-- | isa/rv64uf/fdiv.S | 3 |
2 files changed, 11 insertions, 0 deletions
diff --git a/isa/macros/scalar/test_macros.h b/isa/macros/scalar/test_macros.h index 05ed7c8..4b1e1f5 100644 --- a/isa/macros/scalar/test_macros.h +++ b/isa/macros/scalar/test_macros.h @@ -500,6 +500,14 @@ test_ ## testnum: \ TEST_FP_OP_D_INTERNAL( testnum, flags, double result, val1, 0.0, 0.0, \ inst f3, f0; fmv.x.d a0, f3) +#define TEST_FP_OP1_S_DWORD_RESULT( testnum, inst, flags, result, val1 ) \ + TEST_FP_OP_S_INTERNAL( testnum, flags, dword result, val1, 0.0, 0.0, \ + inst f3, f0; fmv.x.s a0, f3) + +#define TEST_FP_OP1_D_DWORD_RESULT( testnum, inst, flags, result, val1 ) \ + TEST_FP_OP_D_INTERNAL( testnum, flags, dword result, val1, 0.0, 0.0, \ + inst f3, f0; fmv.x.d a0, f3) + #define TEST_FP_OP2_S( testnum, inst, flags, result, val1, val2 ) \ TEST_FP_OP_S_INTERNAL( testnum, flags, float result, val1, val2, 0.0, \ inst f3, f0, f1; fmv.x.s a0, f3) diff --git a/isa/rv64uf/fdiv.S b/isa/rv64uf/fdiv.S index b445663..4002e44 100644 --- a/isa/rv64uf/fdiv.S +++ b/isa/rv64uf/fdiv.S @@ -31,6 +31,9 @@ RVTEST_CODE_BEGIN TEST_FP_OP1_D(13, fsqrt.d, 1, 1.7724538498928541, 3.14159265 ); TEST_FP_OP1_D(14, fsqrt.d, 0, 100, 10000 ); + TEST_FP_OP1_S_DWORD_RESULT(15, fsqrt.s, 0x10, 0x7FC00000, -1.0 ); + TEST_FP_OP1_D_DWORD_RESULT(16, fsqrt.d, 0x10, 0x7FF8000000000000, -1.0 ); + TEST_PASSFAIL RVTEST_CODE_END |