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AgeCommit message (Expand)AuthorFilesLines
2021-09-17Don't use "using"Andrew Waterman1-4/+3
2021-09-17Use RIAA pattern in manipulating ostream flagsAndrew Waterman1-1/+1
2021-09-14add option --cmd to read commands from file (#772)Elmar Melcher1-3/+11
2021-09-06add option --log=<name> to command line help (#795)Elmar Melcher1-0/+1
2021-08-03kill program if socket creation failsElmar Melcher1-0/+1
2021-08-03use socket output stream for processor debug outputElmar Melcher1-1/+1
2021-08-03declare socket properties in processor_tElmar Melcher2-1/+26
2021-08-03declare socket properties in sim_tElmar Melcher1-1/+10
2021-06-02sim: rewrite memory-region overlapping helperChih-Min Chao1-20/+19
2021-02-14Support multiple extensions at the same timeZitao Fang1-3/+5
2021-02-04Fix --kernel and --initrd options w.r.t. sparse mem_t implementationAndrew Waterman1-4/+7
2020-12-29Fix compile warningsAndrew Waterman1-1/+1
2020-10-26Validate integer command-line argumentsAndrew Waterman1-6/+23
2020-09-22Separate build of spike and spike-dasmAndrew Waterman3-1378/+1
2020-09-08rvv: disasm: separate vvm and vvChih-Min Chao1-14/+44
2020-09-08rvv: disasm: fix vamoadd nameChih-Min Chao1-1/+1
2020-08-31rvv: disasm: fix amo sub-opcodeChih-Min Chao1-5/+4
2020-08-31rvv: disasm: fix whole loadChih-Min Chao1-3/+10
2020-08-31rvv: add reciprocal instructionsChih-Min Chao1-0/+2
2020-08-27rvv: remove quad instructionsChih-Min Chao1-4/+0
2020-08-11Add option to dissable implicit ebreak in program bufferSamuel Obuch1-1/+5
2020-07-29rvv: add vrgatherei16.vvChih-Min Chao1-13/+14
2020-07-29rvv: add new whole reg load/store instructionsChih-Min Chao1-2/+25
2020-07-29rvv: op: fix amo namingChih-Min Chao1-4/+4
2020-07-29rvv: disasm: fix missing vamoorei operandsChih-Min Chao1-1/+2
2020-07-21Remove deprecated decoding of xor x0,x0,x0Andrew Waterman1-1/+0
2020-07-09Add kernel command line option for spikeAnup Patel1-0/+18
2020-07-09Add bootargs command-line option to SpikeAnup Patel1-1/+4
2020-06-16Merge pull request #490 from chihminchao/rvv-fix-2020-06-17Andrew Waterman1-1/+1
2020-06-16rvv: disasm: fix vwadd.wx operandChih-Min Chao1-1/+1
2020-06-16zfh: disasm: add fp16 disasmChih-Min Chao1-0/+38
2020-06-11rvv: disasm: fix vfncvt.f.f.wChih-Min Chao1-1/+1
2020-05-28rvv: add new explicit eew load/store instructionsChih-Min Chao1-64/+51
2020-05-28rvv: add amo instructionsChih-Min Chao1-0/+50
2020-05-28rvv: add new singed/unsiged extension instructionsChih-Min Chao1-0/+8
2020-05-28rvv: extenc VU structure to support 0.9 new fieldsChih-Min Chao1-2/+23
2020-05-28rvv: op: change funary opChih-Min Chao1-3/+9
2020-05-28rvv: disasm: add missing .wx formatChih-Min Chao1-1/+3
2020-05-28fix the memory regions checker (#474)Dave Wen1-1/+1
2020-05-10Merge branch 'configurable_PMP'Andrew Waterman2-2/+4
2020-05-04rvv: fp16: support conversion instrucitonsChih-Min Chao1-2/+2
2020-04-30Merge pull request #452 from davetw/mem_region_checkAndrew Waterman1-0/+40
2020-04-27fdt: restructure dtb create and config flowChih-Min Chao1-3/+1
2020-04-27fdt: option: add --dtb option to specify dtb binary fileChih-Min Chao1-0/+3
2020-04-27merge the overlapping or containing memory regions when user specifiedDave.Wen1-0/+40
2020-04-26fdt: import fdt library from OpenSBIChih-Min Chao1-0/+1
2020-04-24rvv: disasm: leave only SEW-bit segment load/storeChih-Min Chao1-66/+0
2020-04-24rvv: add vfslide1[down|up].vf and refine checking ruleChih-Min Chao1-0/+2
2020-04-20rvv: add float conversion for rtz variantsChih-Min Chao1-1/+7
2020-04-13Handle misaligned memories by aligning them, rather than erroringAndrew Waterman1-1/+16
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