rocket-tools/riscv-isa-sim.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2022-07-14	add support for mconfigptr csr: it's hardwired to zero currently	Weiwei Li	1	-1/+1
2022-07-14	add support for m/henvcfgh csrs	Weiwei Li	1	-3/+15
2022-07-13	Properly log mstatush side effect updates	Scott Johnson	3	-2/+6
2022-07-13	Add assertion to ensure proper logging of mstatus changes on RV32	Scott Johnson	1	-0/+4
2022-07-13	Use rv32_low_csr_t for Smstateen CSRs	Scott Johnson	1	-2/+8
2022-07-13	Add proxy for accessing the low 32 bits of a 64-bit CSR	Scott Johnson	3	-1/+37
2022-07-13	Remove no-longer-needed mask from rv32_high_csr_t	Scott Johnson	2	-3/+2
2022-07-13	Remove unnecessary mask from rv32_high_csr_t constructor	Scott Johnson	3	-9/+7
2022-07-13	Remove mstatush mask as unnecessary	Scott Johnson	1	-1/+1
2022-07-13	add check for H extension requires S mode (#1042)	liweiwei90	2	-1/+4
2022-07-11	Merge pull request #1035 from plctlab/plct-smstateen-dev	Andrew Waterman	12	-3506/+3644
2022-07-11	Allow writes to pmp(i-1)cfg on locked pmp(i)cfg (#1039)	YenHaoChen	1	-1/+1
2022-07-09	add smstateen check for fcsr, senvcfg, henvcfg	Weiwei Li	2	-0/+44
2022-07-09	add standalone class for fcsr and senvcfg csr	Weiwei Li	3	-2/+24
2022-07-09	add support for csrs of smstateen extensions	Weiwei Li	4	-0/+106
2022-07-07	modify mstatush_csr_t to general rv32_high_csr_t	Weiwei Li	3	-13/+23
2022-07-07	add isa string parser for smstateen	Weiwei Li	2	-0/+3
2022-07-07	update encoding.h	Weiwei Li	1	-3381/+3444
2022-07-07	remove multi blank lines	Weiwei Li	8	-110/+0
2022-06-06	Don't mask instruction bits	Andrew Waterman	2	-2/+2
2022-06-06	Zero-extend instructions when fetching them from memory	Andrew Waterman	1	-4/+4
2022-06-06	insn_t: don't rely on sign-extension of internal encoding	Andrew Waterman	1	-3/+3
2022-06-03	Remove nonstandard length encoding (#1023)	Andrew Waterman	1	-1/+0
2022-06-01	Remove the now-unused PC_SERIALIZE_WFI	Kip Walker	2	-3/+0
2022-05-26	Fix RV32 hgatp write mask computation (#1014)	Andrew Waterman	1	-1/+1
2022-05-19	Move ebreak* logic from take_trap into instructions. (#1006)	Tim Newsome	5	-10/+25
2022-05-16	Include recently added headers in riscv/riscv.mk.in	Pirmin Vogel	1	-0/+3
2022-05-13	Merge pull request #997 from riscv-software-src/simplify-decode_insn	Andrew Waterman	3	-19/+18
2022-05-12	Remove now-unnecessary null check from decode_insn	Andrew Waterman	1	-2/+2
2022-05-12	Assert that nullptrs can't make their way into the instructions list	Andrew Waterman	1	-0/+2
2022-05-12	Remove insn_func_t::supported field	Andrew Waterman	3	-10/+5
2022-05-12	Don't register instructions that aren't supported	Andrew Waterman	1	-8/+10
2022-05-11	Merge pull request #992 from rbuchner-aril/rb-pbmte	Andrew Waterman	4	-6/+37
2022-05-11	Check for reserved PBMT values during tablewalks and fault if found	Ryan Buchner	1	-0/+4
2022-05-11	Switch from checking for SVPBMT extension to checking *ENVCFG values during t...	Ryan Buchner	1	-2/+4
2022-05-11	Add PBMTE bit to menvcfg and henvcfg mask values	Ryan Buchner	1	-4/+8
2022-05-11	Change henvcfg csr to a henvcfg_csr_t	Ryan Buchner	3	-1/+22
2022-05-11	rvv: fix the checking eew and elen for index load	Chih-Min Chao	1	-0/+1
2022-05-05	Factor out P extension macros into their own headerfactor-out-macros	Andrew Waterman	2	-500/+507
2022-05-05	Factor out V extension macros into their own header	Andrew Waterman	2	-2069/+2076
2022-05-05	Merge pull request #983 from soberl/epmp_updates_2	Scott Johnson	5	-13/+130
2022-05-04	Update pmpaddr_csr_t::access_ok() for ePMP on matching regions	soberl@nvidia.com	1	-5/+31
2022-05-04	Update mmu_t::pmp_ok() for ePMP in case matching region is not found	soberl@nvidia.com	1	-1/+5
2022-05-04	Update csr access rules for ePMP on pmpaddr and pmpcfg	soberl@nvidia.com	1	-7/+31
2022-05-04	Implement the new csr mseccfg for ePMP as dummy	soberl@nvidia.com	4	-0/+63
2022-05-04	Merge pull request #985 from riscv-software-src/trigger_hit	Andrew Waterman	2	-11/+18
2022-05-04	Fix the padding of register names in the log (#987)	Shaked Flur	1	-1/+1
2022-05-02	Use MCONTROL_TYPE_MATCH macro instead of 2	Tim Newsome	1	-1/+1
2022-05-02	Implement mcontrol trigger hit bit.	Tim Newsome	2	-1/+14
2022-04-22	Remove mcontrol_t.h	Tim Newsome	2	-4/+1