index
:
rocket-tools/riscv-isa-sim.git
confprec
cs250
cycleh
debug_rom
debug_rom_fence
device_flags
dtm_reset_error
dts_parsing
dynamic
eos18-bringup
factor-out-macros
fix-bf16
force-rtti
fp-encoding
heterogeneous_mc
hwachav4
increase-stack-size
itrigger-etrigger-cleanup
load_reservation_set_size
log-commits-faster
master
mmio-hack
mvp
no_progbuf
no_progbuf2
nolibfdt
p-ext-0.5.2
plctlab-plct-zce-fix2
plic-clint-endian
plic_uart_v1
priv-1.10
private-l1-caches
pte-info-and-delegation
remove-tests
rivosinc-etrigger_fix_exception_match
rva-profile-support
simplify-misaligned
sodor
sparse-mem
speed2
speedup-hacks
static-link
test
tmp
trigger_priority
tweak_debug_rom
whole-archive
sifive/rvv0.9-phase2
Unnamed repository; edit this file 'description' to name the repository.
root
about
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
fesvr
Age
Commit message (
Expand
)
Author
Files
Lines
2020-12-29
Install config.h into include/fesvr
Andrew Waterman
1
-0
/
+2
2020-12-28
Install fesvr/byteorder.h to fix #622
Andrew Waterman
2
-0
/
+95
2020-11-26
Include stdexcept in ELF loader (#603)
Daniel Bates
1
-0
/
+1
2020-11-16
Fix byteorder issues with struct riscv_stat (#596)
Marcus Comstedt
1
-32
/
+39
2020-11-07
Tag target endian values to help guide conversion code
Marcus Comstedt
5
-52
/
+53
2020-11-07
Implement support for big-endian targets
Marcus Comstedt
5
-12
/
+70
2020-10-21
Update htif.cc (#577)
S.Pawan Kumar
1
-1
/
+1
2020-10-15
reduce sig_len constraint to 4 bytes (#569)
Neel Gala
2
-6
/
+20
2020-10-10
Fix new ELF checks on big endian hosts (#567)
Marcus Comstedt
1
-4
/
+6
2020-09-29
Adding symbol lookup when --enable-commitlog is enabled (#558)
sthiruva
2
-0
/
+24
2020-05-06
Add missing stdexcept imports
Schuyler Eldridge
1
-0
/
+1
2020-04-09
op: update CSR
Chih-Min Chao
1
-2
/
+2
2020-03-29
When enabling the debug module, poll til it's really enabled
Andrew Waterman
1
-0
/
+2
2020-03-16
fixed htif exception typo (#423)
Dai chou
1
-1
/
+1
2020-02-11
FESVR: ensure dmactive is 1 before reading debug module registers
Megan Wachs
1
-3
/
+3
2020-02-10
FESVR: Can't read a DM register when DMACTIVE=0
Megan Wachs
1
-1
/
+1
2020-01-31
Merge pull request #390 from jrtc27/payload
Andrew Waterman
2
-8
/
+37
2020-01-31
Support loading multiple ELF files via a new payload HTIF option
James Clarke
2
-7
/
+31
2020-01-31
Support plusarg +h/+help option for HTIF
James Clarke
2
-1
/
+6
2020-01-25
Allow EM_NONE ELFs, too
Andrew Waterman
2
-1
/
+3
2020-01-25
Refuse to load non-EXEC/non-RISC-V/non-V1 ELFs (#388)
Alexander Lent
2
-0
/
+10
2019-10-28
Whithhold BE ELF loading until BE target support is available
Marcus Comstedt
1
-9
/
+3
2019-10-28
Implement support for big-endian hosts
Marcus Comstedt
4
-40
/
+52
2019-07-05
Add override modifier to fix clang warnings
Andrew Waterman
1
-2
/
+2
2019-06-14
rvv: add the v-spec-0.7.1 encoding
Chih-Min Chao
1
-1471
/
+0
2019-03-31
Build fesvr as -fPIC to improve compatibility with old uses
Andrew Waterman
1
-0
/
+2
2019-03-31
Add fesvr; only globally install fesvr headers/libs
static-link
Andrew Waterman
34
-0
/
+6394
[prev]