index
:
rocket-tools/riscv-isa-sim.git
confprec
cs250
cycleh
debug_rom
debug_rom_fence
device_flags
dtm_reset_error
dts_parsing
dynamic
eos18-bringup
factor-out-macros
fix-bf16
force-rtti
fp-encoding
heterogeneous_mc
hwachav4
increase-stack-size
itrigger-etrigger-cleanup
load_reservation_set_size
log-commits-faster
master
mmio-hack
mvp
no_progbuf
no_progbuf2
nolibfdt
p-ext-0.5.2
plctlab-plct-zce-fix2
plic-clint-endian
plic_uart_v1
priv-1.10
private-l1-caches
pte-info-and-delegation
remove-tests
rivosinc-etrigger_fix_exception_match
rva-profile-support
simplify-misaligned
sodor
sparse-mem
speedup-hacks
static-link
test
tmp
trigger_priority
tweak_debug_rom
whole-archive
sifive/rvv0.9-phase2
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Author
Files
Lines
2020-04-09
op: update CSR
Chih-Min Chao
4
-14
/
+40
2020-04-09
rvv: missing vector enabling check for mask operation
Chih-Min Chao
1
-0
/
+1
2020-04-02
option: flag x extension without loading shared lib (#439)
Chih-Min Chao
1
-1
/
+5
2020-04-02
Deny hart access to debug CSRs when not in D-mode
Andrew Waterman
1
-0
/
+8
2020-03-30
Assert that debug_module is initialized correctly. (#437)
Tim Newsome
1
-0
/
+1
2020-03-29
Merge pull request #436 from riscv/fix-435
Andrew Waterman
1
-0
/
+2
2020-03-29
When enabling the debug module, poll til it's really enabled
Andrew Waterman
1
-0
/
+2
2020-03-29
Fix debug segfault by partially reverting #409
Andrew Waterman
1
-2
/
+3
2020-03-27
Merge pull request #433 from chihminchao/rvv-fix-2020-03-27
Andrew Waterman
13
-25
/
+35
2020-03-27
Write execution logs to a named log file (#409)
Rupert Swarbrick
8
-83
/
+152
2020-03-27
rvv: fix int_max/min value calculation
Chih-Min Chao
8
-23
/
+26
2020-03-27
rvv: fix vssra.vi e64 corner case
Chih-Min Chao
1
-1
/
+1
2020-03-27
rvv: check vlen == slen
Chih-Min Chao
1
-0
/
+2
2020-03-27
rvv: fix vmv reg checking failure
Chih-Min Chao
3
-1
/
+6
2020-03-24
Allow PATH lookup for executing dtc (#432)
綺麗な賢狼ホロ
1
-1
/
+1
2020-03-23
Merge pull request #425 from chihminchao/rvv-fix-2020-03-17
Andrew Waterman
10
-25
/
+33
2020-03-23
rvv: restrict segment load register rule
Chih-Min Chao
4
-3
/
+4
2020-03-23
rvv: fix WARL behavior for vxsat and vxrm
Chih-Min Chao
1
-2
/
+2
2020-03-23
rvv: fix vdiv corner case
Chih-Min Chao
2
-2
/
+2
2020-03-23
rvv: sf: handle signaling NaN for fmax/fmin
Chih-Min Chao
1
-10
/
+10
2020-03-23
commitlog: fix wrong dump when exception occurs
Chih-Min Chao
2
-8
/
+15
2020-03-23
Don't acquire load reservation in the event of a fault
Andrew Waterman
2
-2
/
+4
2020-03-22
Fix hard-coded path to DTC that breaks packaging (#428)
Joel Sherrill
2
-15
/
+3
2020-03-20
ebreak should write mtval with 0, not pc
Andrew Waterman
3
-3
/
+3
2020-03-16
fixed htif exception typo (#423)
Dai chou
1
-1
/
+1
2020-03-12
rvv: commitlog: fix vrgather_vv dump (#421)
Chih-Min Chao
1
-4
/
+4
2020-03-12
Merge pull request #420 from chihminchao/rvv-fix-2020-03-11
Andrew Waterman
10
-30
/
+35
2020-03-12
rvv: commitlog: fix missing dump for some instructions
Chih-Min Chao
8
-29
/
+32
2020-03-12
rvv: fix vfmv.s.f and vfmv.f.s
Chih-Min Chao
2
-1
/
+3
2020-03-10
Merge pull request #417 from chihminchao/rvv-fix-2020-03-09
Andrew Waterman
7
-355
/
+437
2020-03-09
op: rvv: update encoding
Chih-Min Chao
1
-315
/
+372
2020-03-09
commitlog: enhance vector dump
Chih-Min Chao
2
-5
/
+17
2020-03-09
rvv: enhance --varch to parse string type options
Zhen Wei
3
-34
/
+46
2020-03-09
rvv: handle middle value of vslidedown.vx
Chih-Min Chao
1
-1
/
+1
2020-03-09
rvv: vstart must be 0 for reduction instructions
Chih-Min Chao
1
-0
/
+1
2020-03-05
Make debug printfs only show in debug builds. (#414)
Andrew Waterman
1
-6
/
+6
2020-03-04
Don't clobber trigger types when initializing state
Andrew Waterman
1
-1
/
+1
2020-02-28
Merge branch 'rswarbrick-mcountinhibit'
Andrew Waterman
2
-0
/
+3
2020-02-28
Add do-nothing support for mcountinhibit CSR
Rupert Swarbrick
2
-0
/
+3
2020-02-28
Enable SOFTFLOAT_ROUND_ODD for vfncvt.rod.f.f.w
Andrew Waterman
1
-0
/
+1
2020-02-27
Merge pull request #405 from riscv/mstatus-sxl-uxl
Udit Khanna
1
-7
/
+8
2020-02-27
Check presence of [S|U] extension for mstatus.[sxl|uxl] read/write
Udit Khanna
1
-7
/
+8
2020-02-27
Merge pull request #406 from rswarbrick/cflags
Andrew Waterman
6
-24
/
+325
2020-02-27
Allow overriding CFLAGS and similar when building
Rupert Swarbrick
6
-24
/
+325
2020-02-21
Allow debug accesses from MMUs not bound to processors
Andrew Waterman
1
-1
/
+1
2020-02-21
Initialize some uninitialized state
Andrew Waterman
2
-1
/
+4
2020-02-20
Disallow access to debug memory region unless in debug mode
Andrew Waterman
2
-3
/
+31
2020-02-20
Debug can actually start at 0x0 now
Andrew Waterman
1
-2
/
+1
2020-02-20
Merge pull request #403 from chihminchao/rvv-fix-2020-02-20
Andrew Waterman
6
-10
/
+3
2020-02-20
rvv: only check segment overlapping in index load
Chih-Min Chao
1
-4
/
+2
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