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| author | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-03-24 21:28:22 -0700 |
|---|---|---|
| committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-03-27 02:15:26 -0700 |
| commit | a91e62f6c189c7d2f4ecc0ee47a4582bc3f89b9d (patch) | |
| tree | 1c73848fca5f3acca1f81c09b00856a4d6fa95ff | |
| parent | 66b44bfbedda562a32e4a2cd0716afbf731b69cd (diff) | |
| download | riscv-isa-sim-a91e62f6c189c7d2f4ecc0ee47a4582bc3f89b9d.zip riscv-isa-sim-a91e62f6c189c7d2f4ecc0ee47a4582bc3f89b9d.tar.gz riscv-isa-sim-a91e62f6c189c7d2f4ecc0ee47a4582bc3f89b9d.tar.bz2 | |
rvv: fix vmv reg checking failure
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
| -rw-r--r-- | riscv/insns/vmv_v_i.h | 2 | ||||
| -rw-r--r-- | riscv/insns/vmv_v_v.h | 3 | ||||
| -rw-r--r-- | riscv/insns/vmv_v_x.h | 2 |
3 files changed, 6 insertions, 1 deletions
diff --git a/riscv/insns/vmv_v_i.h b/riscv/insns/vmv_v_i.h index 31e9877..f6b5b48 100644 --- a/riscv/insns/vmv_v_i.h +++ b/riscv/insns/vmv_v_i.h @@ -1,4 +1,6 @@ // vmv.v.i vd, simm5 +require_vector; +VI_CHECK_SSS(false); VI_VVXI_MERGE_LOOP ({ vd = simm5; diff --git a/riscv/insns/vmv_v_v.h b/riscv/insns/vmv_v_v.h index a4f9a5c..523f2d9 100644 --- a/riscv/insns/vmv_v_v.h +++ b/riscv/insns/vmv_v_v.h @@ -1,5 +1,6 @@ // vvmv.v.v vd, vs1 -require((insn.rs1() & (P.VU.vlmul - 1)) == 0); +require_vector; +VI_CHECK_SSS(true); VI_VVXI_MERGE_LOOP ({ vd = vs1; diff --git a/riscv/insns/vmv_v_x.h b/riscv/insns/vmv_v_x.h index 4688b3f..7528f41 100644 --- a/riscv/insns/vmv_v_x.h +++ b/riscv/insns/vmv_v_x.h @@ -1,4 +1,6 @@ // vmv.v.x vd, rs1 +require_vector; +VI_CHECK_SSS(false); VI_VVXI_MERGE_LOOP ({ vd = rs1; |