aboutsummaryrefslogtreecommitdiff
AgeCommit message (Expand)AuthorFilesLines
2017-01-06Comply with GNU coding standards.David Craven1-2/+2
2016-12-30Only read exception flag in gdb register read/write. (#85)Brian Campbell1-2/+2
2016-12-21Fix gdb communication error (#82)Brian Campbell1-1/+1
2016-12-21Remove extra gdb protocol responses on register writesBrian Campbell1-2/+0
2016-12-21Fix gdb protocol register read of S0Brian Campbell1-3/+7
2016-12-16Use correct format codes for reg_t and size_tStefan O'Rear3-14/+15
2016-12-15Fix single stepping over faulting instructions. (#80)Tim Newsome1-0/+5
2016-12-12Reuse the ebreak constants in encoding.h.Tim Newsome1-9/+7
2016-12-01Added comments about the modified Duff's Device in execute.cc (#77)Andy Wright1-0/+37
2016-11-13Fix 32-bit host portability bugAndrew Waterman1-1/+1
2016-11-11Ensure that g++ knows it is building a PCH (#75)Ben Gamari1-1/+1
2016-11-10AMOs should always return store faults, not load faultsAndrew Waterman19-54/+38
2016-10-31Make reading/writing fpu regs work.Tim Newsome2-15/+53
2016-10-31Minor code cleanup.Tim Newsome1-1/+1
2016-10-31Check for exception after register write.Tim Newsome1-41/+56
2016-10-28Check for exception after reading a register.Tim Newsome1-7/+14
2016-10-28Fix error message.Tim Newsome1-3/+3
2016-10-25Increase gdb receive buffer.Tim Newsome2-2/+22
2016-10-10Don't force load trigger timing to AfterAndrew Waterman1-2/+0
2016-10-07Don't die when gdb thinks XLEN is 64 but it's 32.Tim Newsome2-5/+19
2016-09-30Return an error to gdb when memory reads fail. (#71)Tim Newsome1-7/+26
2016-09-29Update trigger behavior. (#70)Tim Newsome1-1/+4
2016-09-13restore clang support by fixing printf identifiersScott Beamer2-15/+17
2016-09-09allow MAFDC bits in MISA to be modifiedAndrew Waterman2-0/+19
2016-09-06Remove generic debug tests. (#65)Tim Newsome8-486/+1
2016-09-02Merge pull request #62 from riscv/triggerAndrew Waterman8-58/+710
2016-09-02Merge branch 'master' into triggerTim Newsome4-76/+344
2016-09-02Rebuild debug ROM because CSR encoding changed.Tim Newsome1-2/+2
2016-09-02Support triggers on TLB misses.Tim Newsome3-1/+54
2016-09-01Theoretically support trigger timing.Tim Newsome3-0/+10
2016-08-31Rename tdata[0-2] to tdata[1-3].Tim Newsome2-16/+27
2016-08-31Save/restore tselect. Set dmode.Tim Newsome2-0/+47
2016-08-29Fix indent.Tim Newsome1-1/+1
2016-08-29Rename tdata0--tdata2 to tdata1--tdata3.Tim Newsome4-12/+18
2016-08-26Add (degenerate) performance counter facilityAndrew Waterman3-105/+386
2016-08-25Allow reads from tdrdata registersAndrew Waterman1-0/+3
2016-08-25partially update spike to newer debug specAndrew Waterman5-67/+45
2016-08-25Fix spike interactive (-d) modeAndrew Waterman4-12/+5
2016-08-22remove HWBPCOUNT field of DCSRAndrew Waterman1-1/+0
2016-08-22Implement address and data triggers.Tim Newsome9-62/+633
2016-08-17Allow mstatus.MPP to store bad values; instead, validate on MRETAndrew Waterman3-14/+5
2016-08-16remove old rvc directory (#61)Colin Schmidt36-133/+0
2016-07-28Add support for virtual priv register. (#59)Tim Newsome5-6/+25
2016-07-22Set U bit in misa registerAndrew Waterman1-0/+1
2016-07-19Make address translation work in 32-bit. (#58)Tim Newsome1-5/+9
2016-07-13Fix single step over csrw instructions. (#57)Tim Newsome1-5/+9
2016-07-12Don't treat RVC NOP as illegal instructionAndrew Waterman1-1/+1
2016-07-12Fix page table walker not respecting valid bitAndrew Waterman1-1/+1
2016-07-06Update to new PTE formatAndrew Waterman5-45/+28
2016-07-01Remove debug printf that was cluttering up output.Tim Newsome1-1/+0
generated by cgit v1.1 at 2024-11-16 12:07:12 +0000