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AgeCommit message (Expand)AuthorFilesLines
3 daysMerge pull request #1783 from riscv-software-src/fix-1782HEADmasterAndrew Waterman4-25/+27
3 daysFix exception priority for RV32E JAL/JALRAndrew Waterman3-0/+3
3 daysFix exception priority for RV32E loads and AMOsAndrew Waterman1-1/+1
3 daysRefactor insn_template to be more DRYAndrew Waterman1-24/+23
7 daysMerge pull request #1771 from rtwfroody/match_maskAndrew Waterman1-4/+8
7 daysFix mcontrol6 mask low/high operations.Tim Newsome1-4/+8
8 daysMerge pull request #1722 from ved-rivos/smdbltrpAndrew Waterman12-20/+95
9 daysMerge pull request #1776 from YenHaoChen/pr-pmAndrew Waterman1-4/+6
9 dayspointer masking: refactor: Use xlen to avoid sketchy, hardcoded number 64YenHaoChen1-1/+2
10 dayspointer masking: Fix: Let transformed_addr of fetching be unchangedYenHaoChen1-4/+5
14 daysMerge pull request #1769 from riscv-software-src/b-orderingAndrew Waterman1-1/+1
2024-08-12Merge pull request #1770 from YenHaoChen/pr-simJerry Zhao1-1/+1
2024-08-12Fix a typo in https://github.com/riscv-software-src/riscv-isa-sim/pull/1721/c...YenHaoChen1-1/+1
2024-08-11Fix ordering of B single-letter extensionJerry Zhao1-1/+1
2024-08-09Merge pull request #1768 from riscv-software-src/commit-log-orderedAndrew Waterman1-1/+1
2024-08-09Use ordered map for commit logAndrew Waterman1-1/+1
2024-08-07Merge pull request #1764 from ved-rivos/extsAndrew Waterman1-0/+11
2024-08-07Add SmdbltrpVed Shanbhogue12-20/+95
2024-08-07update readme with extensionsVed Shanbhogue1-0/+11
2024-08-07Merge pull request #1763 from NXP/add-missing-extensionsAndrew Waterman1-0/+2
2024-08-07Add implemented extensions to readmeChristian Herber1-0/+2
2024-08-04Merge pull request #1758 from riscv-software-src/csr-init-fixesAndrew Waterman5-407/+398
2024-08-04Merge pull request #1760 from YenHaoChen/pr-mxrAndrew Waterman1-1/+1
2024-08-05Let MXR not affect implicit memory access for VS-stage address translationYenHaoChen1-1/+1
2024-08-01Merge pull request #1759 from riscv-software-src/dts-apiAndrew Waterman3-10/+18
2024-08-01Only add CSRs if corresponding extensions are enabledAndrew Waterman1-55/+57
2024-08-01Remove boilerplate from most CSR instantiationsAndrew Waterman2-62/+34
2024-08-01Refactor initialization of mode-specific CSRsAndrew Waterman1-20/+18
2024-08-01Add CSRs through an interface, rather than mutating csrmapAndrew Waterman3-148/+156
2024-08-01Move CSR initialization to its own fileAndrew Waterman4-397/+408
2024-08-01In dtc_compile, use c string instead of stl stringAndrew Waterman1-3/+3
2024-08-01Improve dts <-> dtb APIAndrew Waterman3-9/+17
2024-08-01Merge pull request #1721 from abejgonzalez/dts_parsingAndrew Waterman8-136/+195
2024-08-01Merge pull request #1756 from riscv-software-src/clean-up-hpmAndrew Waterman3-17/+18
2024-08-01Merge pull request #1757 from riscv-software-src/fix-1755Andrew Waterman1-1/+1
2024-08-01Fix enabling hypervisor extensionAndrew Waterman1-1/+1
2024-08-01Avoid magic constants in hpmcounter implementationAndrew Waterman3-17/+18
2024-08-01Fix trap interactive outputabejgonzalez1-11/+8
2024-08-01Generalize DTC compilation to support both DTS/Babejgonzalez3-43/+49
2024-08-01Support parsing procs fully from DTSJerry Zhao3-38/+97
2024-08-01Move isa property to a field of processor_t, not sim_tJerry Zhao7-33/+33
2024-08-01Pass cfg into make_dtsJerry Zhao3-18/+15
2024-08-01Merge pull request #1754 from YenHaoChen/pr-vcompressAndrew Waterman1-4/+5
2024-08-01vcompress.vm: Check if there is any vector extension before using vector CSRsYenHaoChen1-4/+5
2024-07-31Merge pull request #1753 from riscv-software-src/fix-1752Andrew Waterman1-26/+30
2024-07-31Fix segfault accessing menvcfg when U-mode doesn't existAndrew Waterman1-26/+30
2024-07-31Merge pull request #1750 from YenHaoChen/pr-vector-xrmAndrew Waterman14-33/+33
2024-07-31vector: Check if there is any vector extension before using vector CSRsYenHaoChen14-33/+33
2024-07-30Merge pull request #1749 from YenHaoChen/pr-vnclip_wxAndrew Waterman1-3/+3
2024-07-31vnclip.wx: Check if there is any vector extension before using vector CSRsYenHaoChen1-3/+3
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