diff options
Diffstat (limited to 'riscv/decode_macros.h')
| -rw-r--r-- | riscv/decode_macros.h | 26 |
1 files changed, 18 insertions, 8 deletions
diff --git a/riscv/decode_macros.h b/riscv/decode_macros.h index bd871fa..7365a86 100644 --- a/riscv/decode_macros.h +++ b/riscv/decode_macros.h @@ -42,6 +42,15 @@ }) #define WRITE_VSTATUS STATE.log_reg_write[3] = {0, 0}; +/* the value parameter needs to be evaluated before writing to the registers */ +#define WRITE_REG_PAIR(reg, value) \ + if (reg != 0) { \ + require((reg) % 2 == 0); \ + uint64_t val = (value); \ + WRITE_REG(reg, sext32(val)); \ + WRITE_REG((reg) + 1, (sreg_t(val)) >> 32); \ + } + // RVC macros #define WRITE_RVC_RS1S(value) WRITE_REG(insn.rvc_rs1s(), value) #define WRITE_RVC_RS2S(value) WRITE_REG(insn.rvc_rs2s(), value) @@ -69,13 +78,15 @@ #define RS1_PAIR READ_REG_PAIR(insn.rs1()) #define RS2_PAIR READ_REG_PAIR(insn.rs2()) #define RD_PAIR READ_REG_PAIR(insn.rd()) +#define WRITE_RD_PAIR(value) WRITE_REG_PAIR(insn.rd(), value) -#define WRITE_RD_PAIR(value) \ - if (insn.rd() != 0) { \ - require(insn.rd() % 2 == 0); \ - WRITE_REG(insn.rd(), sext32(value)); \ - WRITE_REG(insn.rd() + 1, (sreg_t(value)) >> 32); \ - } +// Zilsd macros +#define WRITE_RD_D(value) (xlen == 32 ? WRITE_RD_PAIR(value) : WRITE_RD(value)) + +// Zcmlsd macros +#define WRITE_RVC_RS2S_PAIR(value) WRITE_REG_PAIR(insn.rvc_rs2s(), value) +#define RVC_RS2S_PAIR READ_REG_PAIR(insn.rvc_rs2s()) +#define RVC_RS2_PAIR READ_REG_PAIR(insn.rvc_rs2()) // FPU macros #define READ_ZDINX_REG(reg) (xlen == 32 ? f64(READ_REG_PAIR(reg)) : f64(STATE.XPR[reg] & (uint64_t)-1)) @@ -122,8 +133,7 @@ do { \ do { \ if (p->extension_enabled(EXT_ZFINX)) { \ if (xlen == 32) { \ - uint64_t val = (value).v; \ - WRITE_RD_PAIR(val); \ + WRITE_RD_PAIR((value).v); \ } else { \ WRITE_REG(insn.rd(), (value).v); \ } \ |