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author | Tim Newsome <tim@sifive.com> | 2016-05-05 11:21:07 -0700 |
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committer | Tim Newsome <tim@sifive.com> | 2016-05-23 12:12:12 -0700 |
commit | a950cdebb61e2e86b01becff288e0240c77aa1e5 (patch) | |
tree | a433ea9aa2f041029db050dc38b3cd55fa10fca5 /tests | |
parent | dd233bc49946aa059b6ea9494b870d20076ce1b8 (diff) | |
download | riscv-isa-sim-a950cdebb61e2e86b01becff288e0240c77aa1e5.zip riscv-isa-sim-a950cdebb61e2e86b01becff288e0240c77aa1e5.tar.gz riscv-isa-sim-a950cdebb61e2e86b01becff288e0240c77aa1e5.tar.bz2 |
Fix reading CSRs.
Diffstat (limited to 'tests')
-rwxr-xr-x | tests/gdbserver.py | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/tests/gdbserver.py b/tests/gdbserver.py index c3c2eca..ac191d5 100755 --- a/tests/gdbserver.py +++ b/tests/gdbserver.py @@ -58,12 +58,12 @@ class DebugTest(unittest.TestCase): # mcpuid (which is going to be renamed to misa in any case). #self.assertRegexpMatches(output, ".*mcpuid *0x80") - # The time register should always be changing. - last_time = None + # The instret register should always be changing. + last_instret = None for _ in range(5): - time = self.gdb.p("$time") - self.assertNotEqual(time, last_time) - last_time = time + instret = self.gdb.p("$instret") + self.assertNotEqual(instret, last_instret) + last_instret = instret self.gdb.command("stepi") class RegsTest(unittest.TestCase): |