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| author | Andrew Waterman <andrew@sifive.com> | 2022-10-25 16:27:57 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2022-10-25 16:27:57 -0700 |
| commit | 1f1a7da6babfc68c2e2f87f5b252819bcc50195d (patch) | |
| tree | 6fb9c95022a07c5ddf57f8ffa03106bac876cb67 /riscv/v_ext_macros.h | |
| parent | a66ca951e6cb457d2d1ed87500fdea7283208fc5 (diff) | |
| download | riscv-isa-sim-1f1a7da6babfc68c2e2f87f5b252819bcc50195d.zip riscv-isa-sim-1f1a7da6babfc68c2e2f87f5b252819bcc50195d.tar.gz riscv-isa-sim-1f1a7da6babfc68c2e2f87f5b252819bcc50195d.tar.bz2 | |
Change remaining vector FP16 instructions to require Zvfh
...as opposed to Zfh.
Diffstat (limited to 'riscv/v_ext_macros.h')
| -rw-r--r-- | riscv/v_ext_macros.h | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/riscv/v_ext_macros.h b/riscv/v_ext_macros.h index 0984a80..c7b2e8e 100644 --- a/riscv/v_ext_macros.h +++ b/riscv/v_ext_macros.h @@ -1474,7 +1474,7 @@ reg_t index[P.VU.vlmax]; \ // #define VI_VFP_COMMON \ require_fp; \ - require((P.VU.vsew == e16 && p->extension_enabled(EXT_ZFH)) || \ + require((P.VU.vsew == e16 && p->extension_enabled(EXT_ZVFH)) || \ (P.VU.vsew == e32 && p->extension_enabled('F')) || \ (P.VU.vsew == e64 && p->extension_enabled('D'))); \ require_vector(true); \ @@ -1920,7 +1920,7 @@ reg_t index[P.VU.vlmax]; \ switch (P.VU.vsew) { \ case e16: \ { VI_VFP_CVT_LOOP(CVT_INT_TO_FP_PARAMS(16, 16, sign), \ - { p->extension_enabled(EXT_ZFH); }, \ + { p->extension_enabled(EXT_ZVFH); }, \ BODY16); } \ break; \ case e32: \ @@ -1944,7 +1944,7 @@ reg_t index[P.VU.vlmax]; \ switch (P.VU.vsew) { \ case e16: \ { VI_VFP_CVT_LOOP(CVT_FP_TO_INT_PARAMS(16, 16, sign), \ - { p->extension_enabled(EXT_ZFH); }, \ + { p->extension_enabled(EXT_ZVFH); }, \ BODY16); } \ break; \ case e32: \ |