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author | YenHaoChen <howard25336284@gmail.com> | 2022-12-09 15:32:49 +0800 |
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committer | YenHaoChen <howard25336284@gmail.com> | 2022-12-09 15:32:49 +0800 |
commit | b035edab78ba9248ee1c2334c0ff2cadc7cfb8cb (patch) | |
tree | e830e45d4a9042e3fed9701fd054227958ae1f21 /riscv/triggers.h | |
parent | adfaef00e5cd57bef0aa6a9909b4bff5b3863c40 (diff) | |
download | riscv-isa-sim-b035edab78ba9248ee1c2334c0ff2cadc7cfb8cb.zip riscv-isa-sim-b035edab78ba9248ee1c2334c0ff2cadc7cfb8cb.tar.gz riscv-isa-sim-b035edab78ba9248ee1c2334c0ff2cadc7cfb8cb.tar.bz2 |
refactor: remove proc parameter from functions of module_t
Diffstat (limited to 'riscv/triggers.h')
-rw-r--r-- | riscv/triggers.h | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/riscv/triggers.h b/riscv/triggers.h index 37759df..fccd45b 100644 --- a/riscv/triggers.h +++ b/riscv/triggers.h @@ -176,11 +176,11 @@ public: module_t(unsigned count); ~module_t(); - reg_t tdata1_read(const processor_t * const proc, unsigned index) const noexcept; - bool tdata1_write(processor_t * const proc, unsigned index, const reg_t val) noexcept; - reg_t tdata2_read(const processor_t * const proc, unsigned index) const noexcept; - bool tdata2_write(processor_t * const proc, unsigned index, const reg_t val) noexcept; - reg_t tinfo_read(const processor_t * const proc, unsigned index) const noexcept; + reg_t tdata1_read(unsigned index) const noexcept; + bool tdata1_write(unsigned index, const reg_t val) noexcept; + reg_t tdata2_read(unsigned index) const noexcept; + bool tdata2_write(unsigned index, const reg_t val) noexcept; + reg_t tinfo_read(unsigned index) const noexcept; unsigned count() const { return triggers.size(); } |