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author | YenHaoChen <howard25336284@gmail.com> | 2022-12-30 11:22:20 +0800 |
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committer | YenHaoChen <howard25336284@gmail.com> | 2023-01-04 08:07:52 +0800 |
commit | 007199efdce2b52650fac5822e2dd2351a0a16b9 (patch) | |
tree | 692bc95b2915bcd89b4bb0aa54633a9d8fb57684 /riscv/triggers.h | |
parent | 85f7869bf58a4d9b3d4a09f9f312c2deb7b3c81a (diff) | |
download | riscv-isa-sim-007199efdce2b52650fac5822e2dd2351a0a16b9.zip riscv-isa-sim-007199efdce2b52650fac5822e2dd2351a0a16b9.tar.gz riscv-isa-sim-007199efdce2b52650fac5822e2dd2351a0a16b9.tar.bz2 |
triggers: refactor: add bool itrigger_t::simple_match()
Diffstat (limited to 'riscv/triggers.h')
-rw-r--r-- | riscv/triggers.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/riscv/triggers.h b/riscv/triggers.h index 62d6db8..555ac13 100644 --- a/riscv/triggers.h +++ b/riscv/triggers.h @@ -156,6 +156,7 @@ public: virtual std::optional<match_result_t> detect_trap_match(processor_t * const proc, const trap_t& t) noexcept override; private: + bool simple_match(bool interrupt, reg_t bit) const; bool dmode; bool hit; bool nmi; |