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| author | Scott Johnson <scott.johnson@arilinc.com> | 2023-01-26 10:06:27 -0800 |
|---|---|---|
| committer | Scott Johnson <scott.johnson@arilinc.com> | 2023-03-09 14:07:03 -0800 |
| commit | d7632c8d7f5166ab4bd6d6975a836958b26eee64 (patch) | |
| tree | 9579db02e520aa0ad39cc7f3bac41e65ed416101 /riscv/simif.h | |
| parent | 1ffef82ac10188e45ec0cdc1e7b286b1bf40185a (diff) | |
| download | riscv-isa-sim-d7632c8d7f5166ab4bd6d6975a836958b26eee64.zip riscv-isa-sim-d7632c8d7f5166ab4bd6d6975a836958b26eee64.tar.gz riscv-isa-sim-d7632c8d7f5166ab4bd6d6975a836958b26eee64.tar.bz2 | |
Move debug_mmu used by debug_module up to simif_t
Diffstat (limited to 'riscv/simif.h')
| -rw-r--r-- | riscv/simif.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/riscv/simif.h b/riscv/simif.h index 74ddcdf..aeab5db 100644 --- a/riscv/simif.h +++ b/riscv/simif.h @@ -8,6 +8,7 @@ #include "cfg.h" class processor_t; +class mmu_t; // this is the interface to the simulator used by the processors and memory class simif_t @@ -32,6 +33,7 @@ public: unsigned nprocs() const { return get_cfg().nprocs(); } + mmu_t* debug_mmu; // debug port into main memory, for use by debug_module }; #endif |