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| author | sthiruva <sthiruva@gmail.com> | 2020-09-30 00:39:24 +0530 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-09-29 12:09:24 -0700 |
| commit | 4baf970f1b151400152c43559e601625dc03bd67 (patch) | |
| tree | 159fc751c4bc0044a399343ad43d31e6cad23b52 /riscv/simif.h | |
| parent | e7cdd757248358235f3231cecf6aafdf23201d4e (diff) | |
| download | riscv-isa-sim-4baf970f1b151400152c43559e601625dc03bd67.zip riscv-isa-sim-4baf970f1b151400152c43559e601625dc03bd67.tar.gz riscv-isa-sim-4baf970f1b151400152c43559e601625dc03bd67.tar.bz2 | |
Adding symbol lookup when --enable-commitlog is enabled (#558)
* Adding symbol lookup when --enable-commitlog is enabled
* Removed the #ifdef RISCV_ENABLE_COMMITLOG for all get_symbol related function
Only retained the in processor.cc where it is called.
Co-authored-by: Shajid Thiruvathodi <sthiruva@valtrix.in>
Diffstat (limited to 'riscv/simif.h')
| -rw-r--r-- | riscv/simif.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/riscv/simif.h b/riscv/simif.h index 1d982b3..0e75d45 100644 --- a/riscv/simif.h +++ b/riscv/simif.h @@ -16,6 +16,9 @@ public: virtual bool mmio_store(reg_t addr, size_t len, const uint8_t* bytes) = 0; // Callback for processors to let the simulation know they were reset. virtual void proc_reset(unsigned id) = 0; + + virtual const char* get_symbol(uint64_t addr) = 0; + }; #endif |