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| author | Jerry Zhao <jerryz123@berkeley.edu> | 2022-10-14 11:53:02 -0700 |
|---|---|---|
| committer | Andrew Waterman <aswaterman@gmail.com> | 2022-10-17 15:27:24 -0700 |
| commit | a82ef286216bad81db9477c1c8bc13bb48d6561c (patch) | |
| tree | 2052a1451ea5a56123713d35aab37520faec2b40 /riscv/processor.h | |
| parent | 66a307d6aa1bdb5e5a21fd9decb7ba11ba9fe86f (diff) | |
| download | riscv-isa-sim-a82ef286216bad81db9477c1c8bc13bb48d6561c.zip riscv-isa-sim-a82ef286216bad81db9477c1c8bc13bb48d6561c.tar.gz riscv-isa-sim-a82ef286216bad81db9477c1c8bc13bb48d6561c.tar.bz2 | |
Add command to display privilege level in interactive mode
Diffstat (limited to 'riscv/processor.h')
| -rw-r--r-- | riscv/processor.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/riscv/processor.h b/riscv/processor.h index 8194046..7d5552b 100644 --- a/riscv/processor.h +++ b/riscv/processor.h @@ -299,6 +299,7 @@ public: reg_t legalize_privilege(reg_t); void set_privilege(reg_t); void set_virt(bool); + const char* get_privilege_string(); void update_histogram(reg_t pc); const disassembler_t* get_disassembler() { return disassembler; } |