Template-ize stores

13 files changed, 15 insertions, 15 deletions

diff --git a/riscv/insns/c_fsd.h b/riscv/insns/c_fsd.h
index 6f2c8f4..58c3bcf 100644
--- a/riscv/insns/c_fsd.h
+++ b/riscv/insns/c_fsd.h
@@ -1,4 +1,4 @@
 require_extension('C');
 require_extension('D');
 require_fp;
-MMU.store_uint64(RVC_RS1S + insn.rvc_ld_imm(), RVC_FRS2S.v[0]);
+MMU.store<uint64_t>(RVC_RS1S + insn.rvc_ld_imm(), RVC_FRS2S.v[0]);
diff --git a/riscv/insns/c_fsdsp.h b/riscv/insns/c_fsdsp.h
index 27b9331..ebe7995 100644
--- a/riscv/insns/c_fsdsp.h
+++ b/riscv/insns/c_fsdsp.h
@@ -1,4 +1,4 @@
 require_extension('C');
 require_extension('D');
 require_fp;
-MMU.store_uint64(RVC_SP + insn.rvc_sdsp_imm(), RVC_FRS2.v[0]);
+MMU.store<uint64_t>(RVC_SP + insn.rvc_sdsp_imm(), RVC_FRS2.v[0]);
diff --git a/riscv/insns/c_fsw.h b/riscv/insns/c_fsw.h
index 7085822..381ab5e 100644
--- a/riscv/insns/c_fsw.h
+++ b/riscv/insns/c_fsw.h
@@ -2,7 +2,7 @@ require_extension('C');
 if (xlen == 32) {
   require_extension('F');
   require_fp;
-  MMU.store_uint32(RVC_RS1S + insn.rvc_lw_imm(), RVC_FRS2S.v[0]);
+  MMU.store<uint32_t>(RVC_RS1S + insn.rvc_lw_imm(), RVC_FRS2S.v[0]);
 } else { // c.sd
-  MMU.store_uint64(RVC_RS1S + insn.rvc_ld_imm(), RVC_RS2S);
+  MMU.store<uint64_t>(RVC_RS1S + insn.rvc_ld_imm(), RVC_RS2S);
 }
diff --git a/riscv/insns/c_fswsp.h b/riscv/insns/c_fswsp.h
index c5a003f..9ce408c 100644
--- a/riscv/insns/c_fswsp.h
+++ b/riscv/insns/c_fswsp.h
@@ -2,7 +2,7 @@ require_extension('C');
 if (xlen == 32) {
   require_extension('F');
   require_fp;
-  MMU.store_uint32(RVC_SP + insn.rvc_swsp_imm(), RVC_FRS2.v[0]);
+  MMU.store<uint32_t>(RVC_SP + insn.rvc_swsp_imm(), RVC_FRS2.v[0]);
 } else { // c.sdsp
-  MMU.store_uint64(RVC_SP + insn.rvc_sdsp_imm(), RVC_RS2);
+  MMU.store<uint64_t>(RVC_SP + insn.rvc_sdsp_imm(), RVC_RS2);
 }
diff --git a/riscv/insns/c_sw.h b/riscv/insns/c_sw.h
index 3073e9d..43f397f 100644
--- a/riscv/insns/c_sw.h
+++ b/riscv/insns/c_sw.h
@@ -1,2 +1,2 @@
 require_extension('C');
-MMU.store_uint32(RVC_RS1S + insn.rvc_lw_imm(), RVC_RS2S);
+MMU.store<uint32_t>(RVC_RS1S + insn.rvc_lw_imm(), RVC_RS2S);
diff --git a/riscv/insns/c_swsp.h b/riscv/insns/c_swsp.h
index b8995ab..a01e466 100644
--- a/riscv/insns/c_swsp.h
+++ b/riscv/insns/c_swsp.h
@@ -1,2 +1,2 @@
 require_extension('C');
-MMU.store_uint32(RVC_SP + insn.rvc_swsp_imm(), RVC_RS2);
+MMU.store<uint32_t>(RVC_SP + insn.rvc_swsp_imm(), RVC_RS2);
diff --git a/riscv/insns/fsd.h b/riscv/insns/fsd.h
index 38c702b..babc9e5 100644
--- a/riscv/insns/fsd.h
+++ b/riscv/insns/fsd.h
@@ -1,3 +1,3 @@
 require_extension('D');
 require_fp;
-MMU.store_uint64(RS1 + insn.s_imm(), FRS2.v[0]);
+MMU.store<uint64_t>(RS1 + insn.s_imm(), FRS2.v[0]);
diff --git a/riscv/insns/fsh.h b/riscv/insns/fsh.h
index 9eaae1e..dfd6bc5 100644
--- a/riscv/insns/fsh.h
+++ b/riscv/insns/fsh.h
@@ -1,3 +1,3 @@
 require_extension(EXT_ZFHMIN);
 require_fp;
-MMU.store_uint16(RS1 + insn.s_imm(), FRS2.v[0]);
+MMU.store<uint16_t>(RS1 + insn.s_imm(), FRS2.v[0]);
diff --git a/riscv/insns/fsw.h b/riscv/insns/fsw.h
index 8af5184..887f03e 100644
--- a/riscv/insns/fsw.h
+++ b/riscv/insns/fsw.h
@@ -1,3 +1,3 @@
 require_extension('F');
 require_fp;
-MMU.store_uint32(RS1 + insn.s_imm(), FRS2.v[0]);
+MMU.store<uint32_t>(RS1 + insn.s_imm(), FRS2.v[0]);
diff --git a/riscv/insns/sb.h b/riscv/insns/sb.h
index 8729c2d..d9cc8f9 100644
--- a/riscv/insns/sb.h
+++ b/riscv/insns/sb.h
@@ -1 +1 @@
-MMU.store_uint8(RS1 + insn.s_imm(), RS2);
+MMU.store<uint8_t>(RS1 + insn.s_imm(), RS2);
diff --git a/riscv/insns/sd.h b/riscv/insns/sd.h
index 664deb2..5c9dd4e 100644
--- a/riscv/insns/sd.h
+++ b/riscv/insns/sd.h
@@ -1,2 +1,2 @@
 require_rv64;
-MMU.store_uint64(RS1 + insn.s_imm(), RS2);
+MMU.store<uint64_t>(RS1 + insn.s_imm(), RS2);
diff --git a/riscv/insns/sh.h b/riscv/insns/sh.h
index 22aa3a8..8f780c3 100644
--- a/riscv/insns/sh.h
+++ b/riscv/insns/sh.h
@@ -1 +1 @@
-MMU.store_uint16(RS1 + insn.s_imm(), RS2);
+MMU.store<uint16_t>(RS1 + insn.s_imm(), RS2);
diff --git a/riscv/insns/sw.h b/riscv/insns/sw.h
index aa5ead3..a9d7268 100644
--- a/riscv/insns/sw.h
+++ b/riscv/insns/sw.h
@@ -1 +1 @@
-MMU.store_uint32(RS1 + insn.s_imm(), RS2);
+MMU.store<uint32_t>(RS1 + insn.s_imm(), RS2);