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| author | Ved Shanbhogue <ved@rivosinc.com> | 2023-09-23 11:17:48 -0500 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2023-10-18 08:52:02 -0700 |
| commit | 762ed3f5c849d1c7f7e9fff6da3712531663d7a8 (patch) | |
| tree | 2409875db1fe86c225e3e0d8e2f1267d4d55e371 /riscv/insns | |
| parent | 4eb1cceb3d7ddb73a695fd58ee7a819641de2522 (diff) | |
| download | riscv-isa-sim-762ed3f5c849d1c7f7e9fff6da3712531663d7a8.zip riscv-isa-sim-762ed3f5c849d1c7f7e9fff6da3712531663d7a8.tar.gz riscv-isa-sim-762ed3f5c849d1c7f7e9fff6da3712531663d7a8.tar.bz2 | |
add zcmop extension instructions
Diffstat (limited to 'riscv/insns')
| -rw-r--r-- | riscv/insns/c_lui.h | 7 | ||||
| -rw-r--r-- | riscv/insns/c_mop_N.h | 2 |
2 files changed, 7 insertions, 2 deletions
diff --git a/riscv/insns/c_lui.h b/riscv/insns/c_lui.h index 956fa44..3e0e02f 100644 --- a/riscv/insns/c_lui.h +++ b/riscv/insns/c_lui.h @@ -2,7 +2,10 @@ require_extension(EXT_ZCA); if (insn.rvc_rd() == 2) { // c.addi16sp require(insn.rvc_addi16sp_imm() != 0); WRITE_REG(X_SP, sext_xlen(RVC_SP + insn.rvc_addi16sp_imm())); -} else { - require(insn.rvc_imm() != 0); +} else if (insn.rvc_imm() != 0) { // c.lui WRITE_RD(insn.rvc_imm() << 12); +} else if ((insn.rvc_rd() & 1) != 0) { // c.mop.N + #include "c_mop_N.h" +} else { + require(false); } diff --git a/riscv/insns/c_mop_N.h b/riscv/insns/c_mop_N.h new file mode 100644 index 0000000..78ec382 --- /dev/null +++ b/riscv/insns/c_mop_N.h @@ -0,0 +1,2 @@ +require_extension(EXT_ZCA); +require_extension(EXT_ZCMOP); |