Adding Zilsd and Zcmlsd extensions (Load/store pair for RV32)

6 files changed, 43 insertions, 8 deletions

diff --git a/riscv/insns/c_ld.h b/riscv/insns/c_ld.h
index 988ea98..18e0d5e 100644
--- a/riscv/insns/c_ld.h
+++ b/riscv/insns/c_ld.h
@@ -1,2 +1,8 @@
 require_extension(EXT_ZCA);
-WRITE_RVC_RS2S(MMU.load<int64_t>(RVC_RS1S + insn.rvc_ld_imm()));
+require((xlen == 64) || p->extension_enabled(EXT_ZCMLSD));
+
+if (xlen == 32) {
+  WRITE_RVC_RS2S_PAIR(MMU.load<int64_t>(RVC_RS1S + insn.rvc_ld_imm()));
+} else {
+  WRITE_RVC_RS2S(MMU.load<int64_t>(RVC_RS1S + insn.rvc_ld_imm()));
+}
diff --git a/riscv/insns/c_ldsp.h b/riscv/insns/c_ldsp.h
index f196040..d8c8ec8 100644
--- a/riscv/insns/c_ldsp.h
+++ b/riscv/insns/c_ldsp.h
@@ -1,3 +1,9 @@
 require_extension(EXT_ZCA);
+require((xlen == 64) || p->extension_enabled(EXT_ZCMLSD));
 require(insn.rvc_rd() != 0);
-WRITE_RD(MMU.load<int64_t>(RVC_SP + insn.rvc_ldsp_imm()));
+
+if (xlen == 32) {
+  WRITE_RD_PAIR(MMU.load<int64_t>(RVC_SP + insn.rvc_ldsp_imm()));
+} else {
+  WRITE_RD(MMU.load<int64_t>(RVC_SP + insn.rvc_ldsp_imm()));
+}
diff --git a/riscv/insns/c_sd.h b/riscv/insns/c_sd.h
index ff8f77d..dba9b07 100644
--- a/riscv/insns/c_sd.h
+++ b/riscv/insns/c_sd.h
@@ -1,2 +1,8 @@
 require_extension(EXT_ZCA);
-MMU.store<uint64_t>(RVC_RS1S + insn.rvc_ld_imm(), RVC_RS2S);
+require((xlen == 64) || p->extension_enabled(EXT_ZCMLSD));
+
+if (xlen == 32) {
+  MMU.store<uint64_t>(RVC_RS1S + insn.rvc_ld_imm(), RVC_RS2S_PAIR);
+} else {
+  MMU.store<uint64_t>(RVC_RS1S + insn.rvc_ld_imm(), RVC_RS2S);
+}
diff --git a/riscv/insns/c_sdsp.h b/riscv/insns/c_sdsp.h
index f7b8a28..e95aefa 100644
--- a/riscv/insns/c_sdsp.h
+++ b/riscv/insns/c_sdsp.h
@@ -1,2 +1,8 @@
 require_extension(EXT_ZCA);
-MMU.store<uint64_t>(RVC_SP + insn.rvc_sdsp_imm(), RVC_RS2);
+require((xlen == 64) || p->extension_enabled(EXT_ZCMLSD));
+
+if (xlen == 32) {
+  MMU.store<uint64_t>(RVC_SP + insn.rvc_sdsp_imm(), RVC_RS2_PAIR);
+} else {
+  MMU.store<uint64_t>(RVC_SP + insn.rvc_sdsp_imm(), RVC_RS2);
+}
diff --git a/riscv/insns/ld.h b/riscv/insns/ld.h
index 3dea301..cb0399b 100644
--- a/riscv/insns/ld.h
+++ b/riscv/insns/ld.h
@@ -1,2 +1,8 @@
-require_rv64;
-WRITE_RD(MMU.load<int64_t>(RS1 + insn.i_imm()));
+require((xlen == 64) || p->extension_enabled(EXT_ZILSD));
+
+if (xlen == 32) {
+  WRITE_RD_PAIR(MMU.load<int64_t>(RS1 + insn.i_imm()));
+} else {
+  WRITE_RD(MMU.load<int64_t>(RS1 + insn.i_imm()));
+}
+
diff --git a/riscv/insns/sd.h b/riscv/insns/sd.h
index 5c9dd4e..c80f137 100644
--- a/riscv/insns/sd.h
+++ b/riscv/insns/sd.h
@@ -1,2 +1,7 @@
-require_rv64;
-MMU.store<uint64_t>(RS1 + insn.s_imm(), RS2);
+require((xlen == 64) || p->extension_enabled(EXT_ZILSD));
+
+if (xlen == 32) {
+  MMU.store<uint64_t>(RS1 + insn.s_imm(), RS2_PAIR);
+} else {
+  MMU.store<uint64_t>(RS1 + insn.s_imm(), RS2);
+}