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| author | Andrew Waterman <andrew@sifive.com> | 2023-05-18 21:48:53 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2023-05-18 21:48:53 -0700 |
| commit | 0e83fe66fbf7b918602476bbaacfa6198a90d337 (patch) | |
| tree | 93a72f8e0f093f1c872a0cacb2d822c166954bc0 /riscv/insns/mnret.h | |
| parent | 7a2ff14bff461f2c7adfbf407e11527f55d920db (diff) | |
| download | riscv-isa-sim-rivosinc-etrigger_fix_exception_match.zip riscv-isa-sim-rivosinc-etrigger_fix_exception_match.tar.gz riscv-isa-sim-rivosinc-etrigger_fix_exception_match.tar.bz2 | |
Call stash_privilege more selectivelyrivosinc-etrigger_fix_exception_match
Diffstat (limited to 'riscv/insns/mnret.h')
| -rw-r--r-- | riscv/insns/mnret.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/riscv/insns/mnret.h b/riscv/insns/mnret.h index bc69510..2888f8d 100644 --- a/riscv/insns/mnret.h +++ b/riscv/insns/mnret.h @@ -1,5 +1,6 @@ require_extension(EXT_SMRNMI); require_privilege(PRV_M); +p->stash_privilege(); set_pc_and_serialize(p->get_state()->mnepc->read()); reg_t s = STATE.mnstatus->read(); reg_t prev_prv = get_field(s, MNSTATUS_MNPP); |