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| author | Andrew Waterman <waterman@cs.berkeley.edu> | 2015-03-12 17:32:43 -0700 |
|---|---|---|
| committer | Andrew Waterman <waterman@cs.berkeley.edu> | 2015-03-12 17:32:43 -0700 |
| commit | ea58df801f36605b462783a61b5266bdd9a40eb0 (patch) | |
| tree | ec6c4736f29e9f2021a9e448946e0a0169639cc1 /riscv/insns/ld.h | |
| parent | 9af855a28e7dc4009ad31312840ca6f9396d572e (diff) | |
| download | riscv-isa-sim-ea58df801f36605b462783a61b5266bdd9a40eb0.zip riscv-isa-sim-ea58df801f36605b462783a61b5266bdd9a40eb0.tar.gz riscv-isa-sim-ea58df801f36605b462783a61b5266bdd9a40eb0.tar.bz2 | |
Update to new privileged spec
Sorry, everyone.
Diffstat (limited to 'riscv/insns/ld.h')
| -rw-r--r-- | riscv/insns/ld.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/riscv/insns/ld.h b/riscv/insns/ld.h index d36e172..1122b98 100644 --- a/riscv/insns/ld.h +++ b/riscv/insns/ld.h @@ -1,2 +1,2 @@ -require_xpr64; +require_rv64; WRITE_RD(MMU.load_int64(RS1 + insn.i_imm())); |