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| author | Andrew Waterman <aswaterman@gmail.com> | 2015-01-02 17:29:05 -0800 |
|---|---|---|
| committer | Andrew Waterman <aswaterman@gmail.com> | 2015-01-02 17:29:05 -0800 |
| commit | ec297672b0c9d58d1ee6c2ac976ccf28863bd3c2 (patch) | |
| tree | 3ddc58262ddca8b2f610cff9e53bf4390a989d8c /riscv/insns/jal.h | |
| parent | 3fd738af16ef977f1aa507e2525bb4c16fff9026 (diff) | |
| download | riscv-isa-sim-ec297672b0c9d58d1ee6c2ac976ccf28863bd3c2.zip riscv-isa-sim-ec297672b0c9d58d1ee6c2ac976ccf28863bd3c2.tar.gz riscv-isa-sim-ec297672b0c9d58d1ee6c2ac976ccf28863bd3c2.tar.bz2 | |
On misaligned fetch, set EPC to target, not branch itself
Diffstat (limited to 'riscv/insns/jal.h')
| -rw-r--r-- | riscv/insns/jal.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/riscv/insns/jal.h b/riscv/insns/jal.h index 2694dee..cd59964 100644 --- a/riscv/insns/jal.h +++ b/riscv/insns/jal.h @@ -1,2 +1,3 @@ -WRITE_RD(npc); +reg_t tmp = npc; set_pc(JUMP_TARGET); +WRITE_RD(tmp); |