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| author | Andrew Waterman <waterman@cs.berkeley.edu> | 2015-04-03 21:53:22 -0700 |
|---|---|---|
| committer | Andrew Waterman <waterman@cs.berkeley.edu> | 2015-04-03 21:53:22 -0700 |
| commit | c4350ef6ef6259e48509e125fd2d051969dc6efa (patch) | |
| tree | 7f6b0900717eea640d687fc677d2cd39c97a9dd2 /riscv/insns/divuw.h | |
| parent | d9d73d80c1b738b3b30eb40d192f61cbdb0e201f (diff) | |
| download | riscv-isa-sim-c4350ef6ef6259e48509e125fd2d051969dc6efa.zip riscv-isa-sim-c4350ef6ef6259e48509e125fd2d051969dc6efa.tar.gz riscv-isa-sim-c4350ef6ef6259e48509e125fd2d051969dc6efa.tar.bz2 | |
Support setting ISA/subsets with --isa flag
Default is RV64IMAFDC. Can do things like
--isa=RV32 (which implies IMAFDC)
--isa=IM (which implies RV64)
--isa=RV64IMAFDXhwacha
Diffstat (limited to 'riscv/insns/divuw.h')
| -rw-r--r-- | riscv/insns/divuw.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/riscv/insns/divuw.h b/riscv/insns/divuw.h index a613d95..e127619 100644 --- a/riscv/insns/divuw.h +++ b/riscv/insns/divuw.h @@ -1,3 +1,4 @@ +require_extension('M'); require_rv64; reg_t lhs = zext32(RS1); reg_t rhs = zext32(RS2); |