diff options
| author | Andrew Waterman <waterman@cs.berkeley.edu> | 2015-05-21 00:21:46 -0700 |
|---|---|---|
| committer | Andrew Waterman <waterman@cs.berkeley.edu> | 2015-05-31 18:29:45 -0700 |
| commit | bdcb5b297f9919bdd1a1b6031a3b5c469e982d14 (patch) | |
| tree | a9c411e8bd1dba295217d8aa28f23b56d4f39313 /riscv/insns/c_lw.h | |
| parent | 292fef830dad9d6d8b868ba27cf4ddd80bf9243a (diff) | |
| download | riscv-isa-sim-bdcb5b297f9919bdd1a1b6031a3b5c469e982d14.zip riscv-isa-sim-bdcb5b297f9919bdd1a1b6031a3b5c469e982d14.tar.gz riscv-isa-sim-bdcb5b297f9919bdd1a1b6031a3b5c469e982d14.tar.bz2 | |
New RV64C proposal
Diffstat (limited to 'riscv/insns/c_lw.h')
| -rw-r--r-- | riscv/insns/c_lw.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/riscv/insns/c_lw.h b/riscv/insns/c_lw.h index f2fc299..ef49dd9 100644 --- a/riscv/insns/c_lw.h +++ b/riscv/insns/c_lw.h @@ -1,2 +1,2 @@ require_extension('C'); -WRITE_RVC_RDS(MMU.load_int32(RVC_RS1S + insn.rvc_lw_imm())); +WRITE_RVC_RS2S(MMU.load_int32(RVC_RS1S + insn.rvc_lw_imm())); |