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| author | Andrew Waterman <andrew@sifive.com> | 2021-10-18 18:39:17 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2021-10-18 18:39:17 -0700 |
| commit | 1453b3588bdb6f42767c0c2ee2ffcd70ddf97afa (patch) | |
| tree | e29afc0a2c2ec67ba505c0fa428464dd8698e268 /riscv/disasm.h | |
| parent | 35cfde167a31f19a93557d7ecb41e18a989f85af (diff) | |
| download | riscv-isa-sim-1453b3588bdb6f42767c0c2ee2ffcd70ddf97afa.zip riscv-isa-sim-1453b3588bdb6f42767c0c2ee2ffcd70ddf97afa.tar.gz riscv-isa-sim-1453b3588bdb6f42767c0c2ee2ffcd70ddf97afa.tar.bz2 | |
Speed up disassembler_t::lookup
Optimize the hash functions for RISC-V instruction encodings. This is
only a perf optimization; instructions that don't adhere to RISC-V
standard practice will still disassemble correctly, just more slowly.
Diffstat (limited to 'riscv/disasm.h')
| -rw-r--r-- | riscv/disasm.h | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/riscv/disasm.h b/riscv/disasm.h index 8e60031..f57fd49 100644 --- a/riscv/disasm.h +++ b/riscv/disasm.h @@ -88,8 +88,18 @@ class disassembler_t void add_insn(disasm_insn_t* insn); private: - static const int HASH_SIZE = 256; + static const int HASH_SIZE = 255; std::vector<const disasm_insn_t*> chain[HASH_SIZE+1]; + + const disasm_insn_t* probe_once(insn_t insn, size_t idx) const; + + static const unsigned int MASK1 = 0x7f; + static const unsigned int MASK2 = 0xe003; + + static const unsigned int hash(insn_bits_t insn, unsigned int mask) + { + return (insn & mask) % HASH_SIZE; + } }; #endif |