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author | Ved Shanbhogue <ved@rivosinc.com> | 2023-12-30 14:20:00 -0600 |
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committer | Ved Shanbhogue <ved@rivosinc.com> | 2023-12-30 14:20:00 -0600 |
commit | da2f415bb62bec3e93b33b379d787b4262aade9f (patch) | |
tree | b2efd01852e6bb8537a29e389ba3b41771925a14 /riscv/csrs.cc | |
parent | f557404ceaf1c9a5cecf82a49e557dc5fbf4a728 (diff) | |
download | riscv-isa-sim-da2f415bb62bec3e93b33b379d787b4262aade9f.zip riscv-isa-sim-da2f415bb62bec3e93b33b379d787b4262aade9f.tar.gz riscv-isa-sim-da2f415bb62bec3e93b33b379d787b4262aade9f.tar.bz2 |
Add srmcfg CSR
Diffstat (limited to 'riscv/csrs.cc')
-rw-r--r-- | riscv/csrs.cc | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/riscv/csrs.cc b/riscv/csrs.cc index 4783646..b3a09a6 100644 --- a/riscv/csrs.cc +++ b/riscv/csrs.cc @@ -1692,3 +1692,22 @@ bool smcntrpmf_csr_t::unlogged_write(const reg_t val) noexcept { prev_val = read(); return masked_csr_t::unlogged_write(val); } + +srmcfg_csr_t::srmcfg_csr_t(processor_t* const proc, const reg_t addr, const reg_t mask, const reg_t init): + masked_csr_t(proc, addr, mask, init) { +} + +void srmcfg_csr_t::verify_permissions(insn_t insn, bool write) const { + csr_t::verify_permissions(insn, write); + + if (!proc->extension_enabled(EXT_SSQOSID)) + throw trap_illegal_instruction(insn.bits()); + + if (proc->extension_enabled(EXT_SMSTATEEN)) { + if ((state->prv < PRV_M) && !(state->mstateen[0]->read() & MSTATEEN0_PRIV114)) + throw trap_illegal_instruction(insn.bits()); + } + + if (state->v) + throw trap_virtual_instruction(insn.bits()); +} |