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| author | YenHaoChen <howard25336284@gmail.com> | 2022-12-05 10:37:28 +0800 |
|---|---|---|
| committer | YenHaoChen <howard25336284@gmail.com> | 2022-12-09 16:11:12 +0800 |
| commit | a0fdc2b225e83d9021b860f4644e090544b15046 (patch) | |
| tree | 894c5b3b1cedd0be6272366778df59eb0ef053f0 /riscv/csrs.cc | |
| parent | 8ce096c6aac1102f68c6098494294e836b5df56a (diff) | |
| download | riscv-isa-sim-a0fdc2b225e83d9021b860f4644e090544b15046.zip riscv-isa-sim-a0fdc2b225e83d9021b860f4644e090544b15046.tar.gz riscv-isa-sim-a0fdc2b225e83d9021b860f4644e090544b15046.tar.bz2 | |
triggers: implement tdata3 CSR fields
Diffstat (limited to 'riscv/csrs.cc')
| -rw-r--r-- | riscv/csrs.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/riscv/csrs.cc b/riscv/csrs.cc index 7149c13..c41890b 100644 --- a/riscv/csrs.cc +++ b/riscv/csrs.cc @@ -1158,11 +1158,11 @@ tdata3_csr_t::tdata3_csr_t(processor_t* const proc, const reg_t addr): } reg_t tdata3_csr_t::read() const noexcept { - return 0; + return proc->TM.tdata3_read(state->tselect->read()); } bool tdata3_csr_t::unlogged_write(const reg_t val) noexcept { - return false; + return proc->TM.tdata3_write(state->tselect->read(), val); } tinfo_csr_t::tinfo_csr_t(processor_t* const proc, const reg_t addr) : |