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author | SuHsien Ho <su-hsien.ho@mediatek.com> | 2023-10-04 15:00:49 +0800 |
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committer | SuHsien Ho <su-hsien.ho@mediatek.com> | 2024-04-18 13:05:28 +0800 |
commit | 9ba5bd3171e97560bc28fe555ff7b8404272a3bb (patch) | |
tree | c0ac867c7df2ce90c83071e93c0ea5f0c6745d70 /riscv/csrs.cc | |
parent | 3192ee4d31f481e84281a24d55bb6130e3743668 (diff) | |
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Add Zicfiss extension from CFI extension, v0.4.0
1. Add EXT_ZICFISS for enable Zicfiss with zicfiss extension name.
2. Add new software exception with tval 3 for shadow stack.
3. Implement sspush_x1/sspush_x5/sspopchk_x1/sspopchk_x5/ssrdp/ssamoswap_w/ssamoswap_d.
4. Implement c_sspush_x1/c_sspopchk_x5 in c_lui.h which has same encoding.
5. Add new special access type ss_access in xlate_flags_t for checking special read/write permission in SS(Shadow Stack) page.
6. Add new ss_load/ss_store/ssamoswap to enable ss_access flag.
7. Check special pte(xwr=010) of SS page.
Diffstat (limited to 'riscv/csrs.cc')
-rw-r--r-- | riscv/csrs.cc | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/riscv/csrs.cc b/riscv/csrs.cc index 4a612e5..2bd8b0d 100644 --- a/riscv/csrs.cc +++ b/riscv/csrs.cc @@ -1757,3 +1757,13 @@ bool hvip_csr_t::unlogged_write(const reg_t val) noexcept { state->mip->write_with_mask(MIP_VSSIP, val); // hvip.VSSIP is an alias of mip.VSSIP return basic_csr_t::unlogged_write(val & (MIP_VSEIP | MIP_VSTIP)); } + +ssp_csr_t::ssp_csr_t(processor_t* const proc, const reg_t addr, const reg_t mask, const reg_t init): + masked_csr_t(proc, addr, mask, init) { +} + +void ssp_csr_t::verify_permissions(insn_t insn, bool write) const { + masked_csr_t::verify_permissions(insn, write); + DECLARE_XENVCFG_VARS(SSE); + require_envcfg(SSE); +} |