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| author | Aaron Durbin <adurbin@rivosinc.com> | 2023-01-27 08:55:05 -0800 |
|---|---|---|
| committer | Aaron Durbin <adurbin@rivosinc.com> | 2023-01-27 10:37:20 -0800 |
| commit | afff588a4b366193d4a2acd911d1c3a2f3908f73 (patch) | |
| tree | ab9213a74ec24a76ff4bc6787edd316f1d2e2790 /riscv/cfg.h | |
| parent | 41e2ec0c89b3c618f758bafc560a9fa746135c87 (diff) | |
| download | riscv-isa-sim-afff588a4b366193d4a2acd911d1c3a2f3908f73.zip riscv-isa-sim-afff588a4b366193d4a2acd911d1c3a2f3908f73.tar.gz riscv-isa-sim-afff588a4b366193d4a2acd911d1c3a2f3908f73.tar.bz2 | |
Remove dirty_enabled from cfg_t
The addition of Svadu support and removal of --mmu-dirty
command line flag results in the dirty_enabled configuration state
no longer being used. Remove the remnants of this state.
Diffstat (limited to 'riscv/cfg.h')
| -rw-r--r-- | riscv/cfg.h | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/riscv/cfg.h b/riscv/cfg.h index a40bbf5..58c792c 100644 --- a/riscv/cfg.h +++ b/riscv/cfg.h @@ -67,7 +67,6 @@ public: const char *default_varch, const bool default_misaligned, const endianness_t default_endianness, - const bool default_dirty_enabled, const reg_t default_pmpregions, const std::vector<mem_cfg_t> &default_mem_layout, const std::vector<int> default_hartids, @@ -80,7 +79,6 @@ public: varch(default_varch), misaligned(default_misaligned), endianness(default_endianness), - dirty_enabled(default_dirty_enabled), pmpregions(default_pmpregions), mem_layout(default_mem_layout), hartids(default_hartids), @@ -96,7 +94,6 @@ public: cfg_arg_t<const char *> varch; bool misaligned; endianness_t endianness; - bool dirty_enabled; reg_t pmpregions; cfg_arg_t<std::vector<mem_cfg_t>> mem_layout; std::optional<reg_t> start_pc; |