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author | Scott Johnson <scott.johnson@arilinc.com> | 2022-07-15 18:15:09 -0700 |
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committer | Scott Johnson <scott.johnson@arilinc.com> | 2022-07-18 07:02:02 -0700 |
commit | d61dceccdb43ae0025b3f02d825c3783e8ae10ea (patch) | |
tree | 5ac63423d018687ef48aad70c67b0a97b3ac8da1 | |
parent | f0d84787423ef5a0329bb79c45775dbc7ec16de5 (diff) | |
download | riscv-isa-sim-d61dceccdb43ae0025b3f02d825c3783e8ae10ea.zip riscv-isa-sim-d61dceccdb43ae0025b3f02d825c3783e8ae10ea.tar.gz riscv-isa-sim-d61dceccdb43ae0025b3f02d825c3783e8ae10ea.tar.bz2 |
Fix totally-broken misaligned HLV/HLVX
They were accessing memory using the current privilege mode instead of
the expected guest privilege.
Once #872 is fixed, I suspect we can greatly simplify this.
-rw-r--r-- | riscv/mmu.h | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/riscv/mmu.h b/riscv/mmu.h index fdc641f..70cb9e2 100644 --- a/riscv/mmu.h +++ b/riscv/mmu.h @@ -58,7 +58,11 @@ public: reg_t res = 0; for (size_t i = 0; i < size; i++) { const reg_t byteaddr = addr + (target_big_endian? size-1-i : i); - const reg_t bytedata = load_uint8(byteaddr); + const reg_t bytedata + = (RISCV_XLATE_VIRT_HLVX & xlate_flags) ? guest_load_x_uint8(byteaddr) + : (RISCV_XLATE_VIRT & xlate_flags) ? guest_load_uint8(byteaddr) + : load_uint8(byteaddr) + ; res += bytedata << (i * 8); } return res; @@ -129,6 +133,7 @@ public: load_func(uint16, guest_load, RISCV_XLATE_VIRT) load_func(uint32, guest_load, RISCV_XLATE_VIRT) load_func(uint64, guest_load, RISCV_XLATE_VIRT) + load_func(uint8, guest_load_x, RISCV_XLATE_VIRT|RISCV_XLATE_VIRT_HLVX) // only for use by misaligned HLVX load_func(uint16, guest_load_x, RISCV_XLATE_VIRT|RISCV_XLATE_VIRT_HLVX) load_func(uint32, guest_load_x, RISCV_XLATE_VIRT|RISCV_XLATE_VIRT_HLVX) |