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author | YenHaoChen <howard25336284@gmail.com> | 2023-01-04 09:58:57 +0800 |
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committer | YenHaoChen <howard25336284@gmail.com> | 2023-01-04 09:58:57 +0800 |
commit | 89a44eb0a28f5c530aa93ffddc17a9897397ac56 (patch) | |
tree | ac65a2ed21677f53959fc020507c620634ec8c8c | |
parent | 590a36e487dc9bbb8d2c13bc4fd7e9af40cff9ad (diff) | |
download | riscv-isa-sim-89a44eb0a28f5c530aa93ffddc17a9897397ac56.zip riscv-isa-sim-89a44eb0a28f5c530aa93ffddc17a9897397ac56.tar.gz riscv-isa-sim-89a44eb0a28f5c530aa93ffddc17a9897397ac56.tar.bz2 |
triggers: refactor: move mode_match() and textra_match() to private for protected
-rw-r--r-- | riscv/triggers.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/riscv/triggers.h b/riscv/triggers.h index 2d35709..31c5b30 100644 --- a/riscv/triggers.h +++ b/riscv/triggers.h @@ -87,8 +87,6 @@ public: protected: action_t legalize_action(reg_t val) const noexcept; bool common_match(processor_t * const proc) const noexcept; - bool mode_match(state_t * const state) const noexcept; - bool textra_match(processor_t * const proc) const noexcept; reg_t tdata2; bool vs = false; @@ -99,6 +97,8 @@ protected: private: unsigned legalize_mhselect(bool h_enabled) const noexcept; + bool mode_match(state_t * const state) const noexcept; + bool textra_match(processor_t * const proc) const noexcept; struct mhselect_interpretation { const unsigned mhselect; |