Merge pull request #1043 from YenHaoChen/pr-conditionalize-epmp

Conditionalize Smepmp extension (ePMP) support

4 files changed, 10 insertions, 0 deletions

diff --git a/riscv/csrs.cc b/riscv/csrs.cc
index 6f8f260..69b5849 100644
--- a/riscv/csrs.cc
+++ b/riscv/csrs.cc
@@ -272,6 +272,12 @@ mseccfg_csr_t::mseccfg_csr_t(processor_t* const proc, const reg_t addr):
     basic_csr_t(proc, addr, 0) {
 }
 
+void mseccfg_csr_t::verify_permissions(insn_t insn, bool write) const {
+  basic_csr_t::verify_permissions(insn, write);
+  if (!proc->extension_enabled(EXT_SMEPMP))
+    throw trap_illegal_instruction(insn.bits());
+}
+
 bool mseccfg_csr_t::get_mml() const noexcept {
   return (read() & MSECCFG_MML);
 }
diff --git a/riscv/csrs.h b/riscv/csrs.h
index 500bde7..0df38bc 100644
--- a/riscv/csrs.h
+++ b/riscv/csrs.h
@@ -132,6 +132,7 @@ class pmpcfg_csr_t: public csr_t {
 class mseccfg_csr_t: public basic_csr_t {
  public:
   mseccfg_csr_t(processor_t* const proc, const reg_t addr);
+  virtual void verify_permissions(insn_t insn, bool write) const override;
   bool get_mml() const noexcept;
   bool get_mmwp() const noexcept;
   bool get_rlb() const noexcept;
diff --git a/riscv/isa_parser.cc b/riscv/isa_parser.cc
index 720f373..81b770c 100644
--- a/riscv/isa_parser.cc
+++ b/riscv/isa_parser.cc
@@ -164,6 +164,8 @@ isa_parser_t::isa_parser_t(const char* str, const char *priv)
     } else if (ext_str == "zkr") {
       extension_table[EXT_ZKR] = true;
     } else if (ext_str == "zkt") {
+    } else if (ext_str == "smepmp") {
+      extension_table[EXT_SMEPMP] = true;
     } else if (ext_str == "smstateen") {
       extension_table[EXT_SMSTATEEN] = true;
     } else if (ext_str == "svnapot") {
diff --git a/riscv/isa_parser.h b/riscv/isa_parser.h
index 8debf5d..6065dbc 100644
--- a/riscv/isa_parser.h
+++ b/riscv/isa_parser.h
@@ -31,6 +31,7 @@ typedef enum {
   EXT_ZBPBO,
   EXT_ZPN,
   EXT_ZPSFOPERAND,
+  EXT_SMEPMP,
   EXT_SMSTATEEN,
   EXT_SVNAPOT,
   EXT_SVPBMT,