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| author | YenHaoChen <howard25336284@gmail.com> | 2024-05-03 08:37:37 +0800 |
|---|---|---|
| committer | YenHaoChen <howard25336284@gmail.com> | 2024-05-03 08:37:37 +0800 |
| commit | 663949952608e9e8e2488d08749a3fc4ec235c76 (patch) | |
| tree | da09e4c8f275ed9dd210455edcdb958f088fe5af | |
| parent | 189ca87e1a51e151488449594271b61c6bf148d7 (diff) | |
| download | riscv-isa-sim-663949952608e9e8e2488d08749a3fc4ec235c76.zip riscv-isa-sim-663949952608e9e8e2488d08749a3fc4ec235c76.tar.gz riscv-isa-sim-663949952608e9e8e2488d08749a3fc4ec235c76.tar.bz2 | |
Zfa: fix: fmaxm.q requires Q instead of D extension
| -rw-r--r-- | riscv/insns/fmaxm_q.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/riscv/insns/fmaxm_q.h b/riscv/insns/fmaxm_q.h index a48031e..d85f9d7 100644 --- a/riscv/insns/fmaxm_q.h +++ b/riscv/insns/fmaxm_q.h @@ -1,4 +1,4 @@ -require_extension('D'); +require_extension('Q'); require_extension(EXT_ZFA); require_fp; ui128_f128 ui1; |