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| author | Weiwei Li <liweiwei@iscas.ac.cn> | 2023-04-14 22:50:43 +0800 |
|---|---|---|
| committer | Weiwei Li <liweiwei@iscas.ac.cn> | 2023-05-29 09:01:21 +0800 |
| commit | 62478900e5f7fd872a2fea5c7b4098a570776e18 (patch) | |
| tree | a39d696c06e414fb1494e35f15a0dd9fe89a5f06 | |
| parent | 48f66191758f3bca04e6d7e85348f266df148c14 (diff) | |
| download | riscv-isa-sim-62478900e5f7fd872a2fea5c7b4098a570776e18.zip riscv-isa-sim-62478900e5f7fd872a2fea5c7b4098a570776e18.tar.gz riscv-isa-sim-62478900e5f7fd872a2fea5c7b4098a570776e18.tar.bz2 | |
Add flh/fsh/fmv_h_x/fmv_x_h instructions to Zvfbfmin/Zvfbfwma extensions
| -rw-r--r-- | riscv/insns/flh.h | 2 | ||||
| -rw-r--r-- | riscv/insns/fmv_h_x.h | 2 | ||||
| -rw-r--r-- | riscv/insns/fmv_x_h.h | 2 | ||||
| -rw-r--r-- | riscv/insns/fsh.h | 2 | ||||
| -rw-r--r-- | riscv/isa_parser.cc | 4 | ||||
| -rw-r--r-- | riscv/isa_parser.h | 1 |
6 files changed, 9 insertions, 4 deletions
diff --git a/riscv/insns/flh.h b/riscv/insns/flh.h index befff2c..67b538a 100644 --- a/riscv/insns/flh.h +++ b/riscv/insns/flh.h @@ -1,3 +1,3 @@ -require_extension(EXT_ZFHMIN); +require_extension(EXT_INTERNAL_ZFH_MOVE); require_fp; WRITE_FRD(f16(MMU.load<uint16_t>(RS1 + insn.i_imm()))); diff --git a/riscv/insns/fmv_h_x.h b/riscv/insns/fmv_h_x.h index e55d607..bc2155c 100644 --- a/riscv/insns/fmv_h_x.h +++ b/riscv/insns/fmv_h_x.h @@ -1,3 +1,3 @@ -require_extension(EXT_ZFHMIN); +require_extension(EXT_INTERNAL_ZFH_MOVE); require_fp; WRITE_FRD(f16(RS1)); diff --git a/riscv/insns/fmv_x_h.h b/riscv/insns/fmv_x_h.h index 7a2e5ff..ca823c1 100644 --- a/riscv/insns/fmv_x_h.h +++ b/riscv/insns/fmv_x_h.h @@ -1,3 +1,3 @@ -require_extension(EXT_ZFHMIN); +require_extension(EXT_INTERNAL_ZFH_MOVE); require_fp; WRITE_RD(sext32((int16_t)(FRS1.v[0]))); diff --git a/riscv/insns/fsh.h b/riscv/insns/fsh.h index dfd6bc5..142d4d4 100644 --- a/riscv/insns/fsh.h +++ b/riscv/insns/fsh.h @@ -1,3 +1,3 @@ -require_extension(EXT_ZFHMIN); +require_extension(EXT_INTERNAL_ZFH_MOVE); require_fp; MMU.store<uint16_t>(RS1 + insn.s_imm(), FRS2.v[0]); diff --git a/riscv/isa_parser.cc b/riscv/isa_parser.cc index be5e51b..bd73b0c 100644 --- a/riscv/isa_parser.cc +++ b/riscv/isa_parser.cc @@ -293,6 +293,10 @@ isa_parser_t::isa_parser_t(const char* str, const char *priv) bad_isa_string(str, "'Zvfbfmin/Zvfbfwma' extension requires 'V' extension"); } + if (extension_table[EXT_ZFBFMIN] || extension_table[EXT_ZVFBFMIN] || extension_table[EXT_ZFHMIN]) { + extension_table[EXT_INTERNAL_ZFH_MOVE] = true; + } + if (extension_table['C']) { extension_table[EXT_ZCA] = true; if (extension_table['F'] && max_xlen == 32) diff --git a/riscv/isa_parser.h b/riscv/isa_parser.h index 04859b6..7558116 100644 --- a/riscv/isa_parser.h +++ b/riscv/isa_parser.h @@ -69,6 +69,7 @@ typedef enum { EXT_XZBR, EXT_XZBT, EXT_SSTC, + EXT_INTERNAL_ZFH_MOVE, NUM_ISA_EXTENSIONS } isa_extension_t; |