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| author | Andrew Waterman <andrew@sifive.com> | 2024-03-25 14:24:54 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-03-25 14:24:54 -0700 |
| commit | 3427b459f88d2334368a1abbdf5a3000957f08e8 (patch) | |
| tree | 44d8d375d15166224f9605d10ec9c161f8b0d3da | |
| parent | 4f84dd2627199a16e9eaabb614842139f53a132a (diff) | |
| parent | fe5c249ac53b818239ca00db7469e78a470febbe (diff) | |
| download | riscv-isa-sim-3427b459f88d2334368a1abbdf5a3000957f08e8.zip riscv-isa-sim-3427b459f88d2334368a1abbdf5a3000957f08e8.tar.gz riscv-isa-sim-3427b459f88d2334368a1abbdf5a3000957f08e8.tar.bz2 | |
Merge pull request #1632 from YenHaoChen/pr-scontext
Narrow scontext.data length to 32
| -rw-r--r-- | riscv/processor.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/riscv/processor.cc b/riscv/processor.cc index 347fff3..3a1eadb 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -417,7 +417,7 @@ void state_t::reset(processor_t* const proc, reg_t max_isa) csrmap[CSR_TDATA3] = std::make_shared<const_csr_t>(proc, CSR_TDATA3, 0); csrmap[CSR_TINFO] = std::make_shared<const_csr_t>(proc, CSR_TINFO, 0); } - unsigned scontext_length = (xlen == 32 ? 16 : 34); // debug spec suggests 16-bit for RV32 and 34-bit for RV64 + unsigned scontext_length = (xlen == 32 ? 16 : 32); // debug spec suggests 16-bit for RV32 and 32-bit for RV64 csrmap[CSR_SCONTEXT] = scontext = std::make_shared<masked_csr_t>(proc, CSR_SCONTEXT, (reg_t(1) << scontext_length) - 1, 0); unsigned hcontext_length = (xlen == 32 ? 6 : 13) + (proc->extension_enabled('H') ? 1 : 0); // debug spec suggest 7-bit (6-bit) for RV32 and 14-bit (13-bit) for RV64 with (without) H extension csrmap[CSR_HCONTEXT] = std::make_shared<masked_csr_t>(proc, CSR_HCONTEXT, (reg_t(1) << hcontext_length) - 1, 0); |