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| author | Andrew Waterman <andrew@sifive.com> | 2024-06-10 18:25:47 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2024-06-11 13:51:14 -0700 |
| commit | 025a50d51af24e8ee94d200ac09041779fe40acf (patch) | |
| tree | c7d7ec01ebc9f78e487fa45d5ed1388d2f85afc6 | |
| parent | 9bcda41ef2ef91a29e78e2955f9bbe8c510a73b8 (diff) | |
| download | riscv-isa-sim-025a50d51af24e8ee94d200ac09041779fe40acf.zip riscv-isa-sim-025a50d51af24e8ee94d200ac09041779fe40acf.tar.gz riscv-isa-sim-025a50d51af24e8ee94d200ac09041779fe40acf.tar.bz2 | |
Add missing instructions to Makefile
| -rw-r--r-- | riscv/riscv.mk.in | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/riscv/riscv.mk.in b/riscv/riscv.mk.in index 469c48d..aef5939 100644 --- a/riscv/riscv.mk.in +++ b/riscv/riscv.mk.in @@ -1061,6 +1061,9 @@ riscv_insn_ext_zimop = \ mop_r_N \ mop_rr_N \ +riscv_insn_ext_zcmop = \ + c_mop_N \ + riscv_insn_ext_zicfilp = \ lpad @@ -1114,6 +1117,7 @@ riscv_insn_list = \ $(riscv_insn_smrnmi) \ $(riscv_insn_svinval) \ $(riscv_insn_ext_zimop) \ + $(riscv_insn_ext_zcmop) \ $(riscv_insn_ext_zicfilp) \ $(riscv_insn_ext_zicfiss) \ |