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| author | Andrew Waterman <andrew@sifive.com> | 2017-05-13 22:37:22 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2017-05-13 22:37:48 -0700 |
| commit | e465de145c69c28230b5c73cc58f96fd9bd04419 (patch) | |
| tree | d64bbc8ac853c7d2a87f645e25893f4537f1107c | |
| parent | 12926c7ad6c437826625f9504a5b18aa31a8ad76 (diff) | |
| download | riscv-isa-sim-e465de145c69c28230b5c73cc58f96fd9bd04419.zip riscv-isa-sim-e465de145c69c28230b5c73cc58f96fd9bd04419.tar.gz riscv-isa-sim-e465de145c69c28230b5c73cc58f96fd9bd04419.tar.bz2 | |
Make C.LI/C.LUI trapping behavior match spec
| -rw-r--r-- | riscv/insns/c_li.h | 1 | ||||
| -rw-r--r-- | riscv/insns/c_lui.h | 2 |
2 files changed, 1 insertions, 2 deletions
diff --git a/riscv/insns/c_li.h b/riscv/insns/c_li.h index 844686d..f9fd66b 100644 --- a/riscv/insns/c_li.h +++ b/riscv/insns/c_li.h @@ -1,3 +1,2 @@ require_extension('C'); -require(insn.rvc_rd() != 0); WRITE_RD(insn.rvc_imm()); diff --git a/riscv/insns/c_lui.h b/riscv/insns/c_lui.h index 130aaed..75d8eb8 100644 --- a/riscv/insns/c_lui.h +++ b/riscv/insns/c_lui.h @@ -3,6 +3,6 @@ if (insn.rvc_rd() == 2) { // c.addi16sp require(insn.rvc_addi16sp_imm() != 0); WRITE_REG(X_SP, sext_xlen(RVC_SP + insn.rvc_addi16sp_imm())); } else { - require(insn.rvc_rd() != 0); + require(insn.rvc_imm() != 0); WRITE_RD(insn.rvc_imm() << 12); } |