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| author | Andrew Waterman <andrew@sifive.com> | 2017-03-07 01:58:41 -0800 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2017-03-07 01:58:41 -0800 |
| commit | 3c8dafeef056dec71e731fe097750391fe1dfc25 (patch) | |
| tree | 89beb2de8497ab15e1417f51444c35192a65dfc0 | |
| parent | cbaa72d24ce1caebc404d1c3bb892de145b0b583 (diff) | |
| download | riscv-isa-sim-3c8dafeef056dec71e731fe097750391fe1dfc25.zip riscv-isa-sim-3c8dafeef056dec71e731fe097750391fe1dfc25.tar.gz riscv-isa-sim-3c8dafeef056dec71e731fe097750391fe1dfc25.tar.bz2 | |
Don't overload illegal instruction trap in interactive code
| -rw-r--r-- | riscv/interactive.cc | 18 |
1 files changed, 10 insertions, 8 deletions
diff --git a/riscv/interactive.cc b/riscv/interactive.cc index 748f454..623c425 100644 --- a/riscv/interactive.cc +++ b/riscv/interactive.cc @@ -18,12 +18,14 @@ #include <vector> #include <algorithm> +DECLARE_TRAP(-1, interactive) + processor_t *sim_t::get_core(const std::string& i) { char *ptr; unsigned long p = strtoul(i.c_str(), &ptr, 10); if (*ptr || p >= num_cores()) - throw trap_illegal_instruction(); + throw trap_interactive(); return get_core(p); } @@ -161,7 +163,7 @@ void sim_t::interactive_quit(const std::string& cmd, const std::vector<std::stri reg_t sim_t::get_pc(const std::vector<std::string>& args) { if(args.size() != 1) - throw trap_illegal_instruction(); + throw trap_interactive(); processor_t *p = get_core(args[0]); return p->state.pc; @@ -175,7 +177,7 @@ void sim_t::interactive_pc(const std::string& cmd, const std::vector<std::string reg_t sim_t::get_reg(const std::vector<std::string>& args) { if(args.size() != 2) - throw trap_illegal_instruction(); + throw trap_interactive(); processor_t *p = get_core(args[0]); @@ -192,7 +194,7 @@ reg_t sim_t::get_reg(const std::vector<std::string>& args) } if (r >= NXPR) - throw trap_illegal_instruction(); + throw trap_interactive(); return p->state.XPR[r]; } @@ -200,14 +202,14 @@ reg_t sim_t::get_reg(const std::vector<std::string>& args) reg_t sim_t::get_freg(const std::vector<std::string>& args) { if(args.size() != 2) - throw trap_illegal_instruction(); + throw trap_interactive(); processor_t *p = get_core(args[0]); int r = std::find(fpr_name, fpr_name + NFPR, args[1]) - fpr_name; if (r == NFPR) r = atoi(args[1].c_str()); if (r >= NFPR) - throw trap_illegal_instruction(); + throw trap_interactive(); return p->state.FPR[r]; } @@ -251,7 +253,7 @@ void sim_t::interactive_fregd(const std::string& cmd, const std::vector<std::str reg_t sim_t::get_mem(const std::vector<std::string>& args) { if(args.size() != 1 && args.size() != 2) - throw trap_illegal_instruction(); + throw trap_interactive(); std::string addr_str = args[0]; mmu_t* mmu = debug_mmu; @@ -293,7 +295,7 @@ void sim_t::interactive_mem(const std::string& cmd, const std::vector<std::strin void sim_t::interactive_str(const std::string& cmd, const std::vector<std::string>& args) { if(args.size() != 1) - throw trap_illegal_instruction(); + throw trap_interactive(); reg_t addr = strtol(args[0].c_str(),NULL,16); |