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| author | Andrew Waterman <andrew@sifive.com> | 2017-04-25 11:40:59 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2017-04-25 11:40:59 -0700 |
| commit | 115297efff43025c66d330db6fc1bc6eda37f905 (patch) | |
| tree | ddd73426f89987f874771c0eba25236963bb3cda | |
| parent | 9b6843b58bd2e3f0ec461f9708e605623c3c13b1 (diff) | |
| download | riscv-isa-sim-115297efff43025c66d330db6fc1bc6eda37f905.zip riscv-isa-sim-115297efff43025c66d330db6fc1bc6eda37f905.tar.gz riscv-isa-sim-115297efff43025c66d330db6fc1bc6eda37f905.tar.bz2 | |
FMV.X.S/FMV.S.X -> FMV.X.W/FMV.W.X
| -rw-r--r-- | riscv/encoding.h | 12 | ||||
| -rw-r--r-- | riscv/insns/fmv_w_x.h (renamed from riscv/insns/fmv_s_x.h) | 0 | ||||
| -rw-r--r-- | riscv/insns/fmv_x_w.h (renamed from riscv/insns/fmv_x_s.h) | 0 | ||||
| -rw-r--r-- | riscv/riscv.mk.in | 4 | ||||
| -rw-r--r-- | spike_main/disasm.cc | 4 |
5 files changed, 10 insertions, 10 deletions
diff --git a/riscv/encoding.h b/riscv/encoding.h index 92106ab..1463801 100644 --- a/riscv/encoding.h +++ b/riscv/encoding.h @@ -519,8 +519,8 @@ #define MASK_FCVT_L_S 0xfff0007f #define MATCH_FCVT_LU_S 0xc0300053 #define MASK_FCVT_LU_S 0xfff0007f -#define MATCH_FMV_X_S 0xe0000053 -#define MASK_FMV_X_S 0xfff0707f +#define MATCH_FMV_X_W 0xe0000053 +#define MASK_FMV_X_W 0xfff0707f #define MATCH_FCLASS_S 0xe0001053 #define MASK_FCLASS_S 0xfff0707f #define MATCH_FCVT_W_D 0xc2000053 @@ -555,8 +555,8 @@ #define MASK_FCVT_S_L 0xfff0007f #define MATCH_FCVT_S_LU 0xd0300053 #define MASK_FCVT_S_LU 0xfff0007f -#define MATCH_FMV_S_X 0xf0000053 -#define MASK_FMV_S_X 0xfff0707f +#define MATCH_FMV_W_X 0xf0000053 +#define MASK_FMV_W_X 0xfff0707f #define MATCH_FCVT_D_W 0xd2000053 #define MASK_FCVT_D_W 0xfff0007f #define MATCH_FCVT_D_WU 0xd2100053 @@ -1122,7 +1122,7 @@ DECLARE_INSN(fcvt_w_s, MATCH_FCVT_W_S, MASK_FCVT_W_S) DECLARE_INSN(fcvt_wu_s, MATCH_FCVT_WU_S, MASK_FCVT_WU_S) DECLARE_INSN(fcvt_l_s, MATCH_FCVT_L_S, MASK_FCVT_L_S) DECLARE_INSN(fcvt_lu_s, MATCH_FCVT_LU_S, MASK_FCVT_LU_S) -DECLARE_INSN(fmv_x_s, MATCH_FMV_X_S, MASK_FMV_X_S) +DECLARE_INSN(fmv_x_w, MATCH_FMV_X_W, MASK_FMV_X_W) DECLARE_INSN(fclass_s, MATCH_FCLASS_S, MASK_FCLASS_S) DECLARE_INSN(fcvt_w_d, MATCH_FCVT_W_D, MASK_FCVT_W_D) DECLARE_INSN(fcvt_wu_d, MATCH_FCVT_WU_D, MASK_FCVT_WU_D) @@ -1140,7 +1140,7 @@ DECLARE_INSN(fcvt_s_w, MATCH_FCVT_S_W, MASK_FCVT_S_W) DECLARE_INSN(fcvt_s_wu, MATCH_FCVT_S_WU, MASK_FCVT_S_WU) DECLARE_INSN(fcvt_s_l, MATCH_FCVT_S_L, MASK_FCVT_S_L) DECLARE_INSN(fcvt_s_lu, MATCH_FCVT_S_LU, MASK_FCVT_S_LU) -DECLARE_INSN(fmv_s_x, MATCH_FMV_S_X, MASK_FMV_S_X) +DECLARE_INSN(fmv_w_x, MATCH_FMV_W_X, MASK_FMV_W_X) DECLARE_INSN(fcvt_d_w, MATCH_FCVT_D_W, MASK_FCVT_D_W) DECLARE_INSN(fcvt_d_wu, MATCH_FCVT_D_WU, MASK_FCVT_D_WU) DECLARE_INSN(fcvt_d_l, MATCH_FCVT_D_L, MASK_FCVT_D_L) diff --git a/riscv/insns/fmv_s_x.h b/riscv/insns/fmv_w_x.h index 5f71323..5f71323 100644 --- a/riscv/insns/fmv_s_x.h +++ b/riscv/insns/fmv_w_x.h diff --git a/riscv/insns/fmv_x_s.h b/riscv/insns/fmv_x_w.h index b722479..b722479 100644 --- a/riscv/insns/fmv_x_s.h +++ b/riscv/insns/fmv_x_w.h diff --git a/riscv/riscv.mk.in b/riscv/riscv.mk.in index e954416..5508a29 100644 --- a/riscv/riscv.mk.in +++ b/riscv/riscv.mk.in @@ -180,9 +180,9 @@ riscv_insn_list = \ fmul_d \ fmul_s \ fmv_d_x \ - fmv_s_x \ + fmv_w_x \ fmv_x_d \ - fmv_x_s \ + fmv_x_w \ fnmadd_d \ fnmadd_s \ fnmsub_d \ diff --git a/spike_main/disasm.cc b/spike_main/disasm.cc index 6931681..56c6fe6 100644 --- a/spike_main/disasm.cc +++ b/spike_main/disasm.cc @@ -456,13 +456,13 @@ disassembler_t::disassembler_t(int xlen) DEFINE_XFTYPE(fcvt_s_w); DEFINE_XFTYPE(fcvt_s_wu); DEFINE_XFTYPE(fcvt_s_wu); - DEFINE_XFTYPE(fmv_s_x); + DEFINE_XFTYPE(fmv_w_x); DEFINE_FXTYPE(fcvt_l_s); DEFINE_FXTYPE(fcvt_lu_s); DEFINE_FXTYPE(fcvt_w_s); DEFINE_FXTYPE(fcvt_wu_s); DEFINE_FXTYPE(fclass_s); - DEFINE_FXTYPE(fmv_x_s); + DEFINE_FXTYPE(fmv_x_w); DEFINE_FXTYPE(feq_s); DEFINE_FXTYPE(flt_s); DEFINE_FXTYPE(fle_s); |