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authorAndrew Waterman <andrew@sifive.com>2017-02-01 23:11:59 -0800
committerAndrew Waterman <andrew@sifive.com>2017-02-01 23:11:59 -0800
commit6642f8c745b320bdb7bab2470c62defb1b1bb9e2 (patch)
tree976ece29fb16dc47c70c2dd2eab52f9c7ba4d642
parentd392463e5c8e47cfa030eb4640585302f800207f (diff)
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For FMIN(sNaN, x) and FMIN(qNaN, qNaN), return canonical NaN
Resolves #76
-rw-r--r--riscv/insn_template.h1
-rw-r--r--riscv/insns/fmax_d.h4
-rw-r--r--riscv/insns/fmax_s.h4
-rw-r--r--riscv/insns/fmin_d.h4
-rw-r--r--riscv/insns/fmin_s.h4
5 files changed, 13 insertions, 4 deletions
diff --git a/riscv/insn_template.h b/riscv/insn_template.h
index 0dd0aa1..07aa16b 100644
--- a/riscv/insn_template.h
+++ b/riscv/insn_template.h
@@ -4,5 +4,6 @@
#include "mulhi.h"
#include "softfloat.h"
#include "internals.h"
+#include "specialize.h"
#include "tracer.h"
#include <assert.h>
diff --git a/riscv/insns/fmax_d.h b/riscv/insns/fmax_d.h
index f0bea9b..56c9c7a 100644
--- a/riscv/insns/fmax_d.h
+++ b/riscv/insns/fmax_d.h
@@ -1,4 +1,6 @@
require_extension('D');
require_fp;
-WRITE_FRD(isNaNF64UI(FRS2) || f64_le_quiet(f64(FRS2), f64(FRS1)) ? FRS1 : FRS2);
+WRITE_FRD(f64_le_quiet(f64(FRS2), f64(FRS1)) || isNaNF64UI(FRS2) ? FRS1 : FRS2);
+if ((isNaNF64UI(FRS1) && isNaNF64UI(FRS2)) || softfloat_exceptionFlags)
+ WRITE_FRD(defaultNaNF64UI);
set_fp_exceptions;
diff --git a/riscv/insns/fmax_s.h b/riscv/insns/fmax_s.h
index 33b2bc6..bf90356 100644
--- a/riscv/insns/fmax_s.h
+++ b/riscv/insns/fmax_s.h
@@ -1,4 +1,6 @@
require_extension('F');
require_fp;
-WRITE_FRD(isNaNF32UI(FRS2) || f32_le_quiet(f32(FRS2), f32(FRS1)) ? FRS1 : FRS2);
+WRITE_FRD(f32_le_quiet(f32(FRS2), f32(FRS1)) || isNaNF32UI(FRS2) ? FRS1 : FRS2);
+if ((isNaNF32UI(FRS1) && isNaNF32UI(FRS2)) || softfloat_exceptionFlags)
+ WRITE_FRD(defaultNaNF32UI);
set_fp_exceptions;
diff --git a/riscv/insns/fmin_d.h b/riscv/insns/fmin_d.h
index e22b6ea..2a1755e 100644
--- a/riscv/insns/fmin_d.h
+++ b/riscv/insns/fmin_d.h
@@ -1,4 +1,6 @@
require_extension('D');
require_fp;
-WRITE_FRD(isNaNF64UI(FRS2) || f64_lt_quiet(f64(FRS1), f64(FRS2)) ? FRS1 : FRS2);
+WRITE_FRD(f64_lt_quiet(f64(FRS1), f64(FRS2)) || isNaNF64UI(FRS2) ? FRS1 : FRS2);
+if ((isNaNF64UI(FRS1) && isNaNF64UI(FRS2)) || softfloat_exceptionFlags)
+ WRITE_FRD(defaultNaNF64UI);
set_fp_exceptions;
diff --git a/riscv/insns/fmin_s.h b/riscv/insns/fmin_s.h
index 0ebb3a8..831a7a2 100644
--- a/riscv/insns/fmin_s.h
+++ b/riscv/insns/fmin_s.h
@@ -1,4 +1,6 @@
require_extension('F');
require_fp;
-WRITE_FRD(isNaNF32UI(FRS2) || f32_lt_quiet(f32(FRS1), f32(FRS2)) ? FRS1 : FRS2);
+WRITE_FRD(f32_lt_quiet(f32(FRS1), f32(FRS2)) || isNaNF32UI(FRS2) ? FRS1 : FRS2);
+if ((isNaNF32UI(FRS1) && isNaNF32UI(FRS2)) || softfloat_exceptionFlags)
+ WRITE_FRD(defaultNaNF32UI);
set_fp_exceptions;