rocket-tools/riscv-gnu-toolchain/spike.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2022-12-20	Reduce compile time increase introduced by #1189	Andrew Waterman	1	-1/+1
2022-12-20	Add logged instruction variants to insn_desc_t	Jerry Zhao	1	-4/+12
2022-12-20	Add logged variants of insn templates	Jerry Zhao	1	-0/+2
2022-10-04	Suppress most unused variable warnings	Andrew Waterman	1	-1/+1
2022-05-12	Remove insn_func_t::supported field	Andrew Waterman	1	-4/+4
2022-04-14	add support for overlap instructions	Weiwei Li	1	-4/+4
2022-03-02	fill rv32e and rv64e function for instructions of rocc and customext	Weiwei Li	1	-4/+4
2015-09-08	Refer to LICENSE in some newer source files	Andrew Waterman	1	-0/+2
2015-03-12	Update to new privileged spec	Andrew Waterman	1	-1/+0
2013-11-05	correctly trap when SR_EA is disabled	Yunsup Lee	1	-0/+1
2013-10-18	refactor disassembler, and add hwacha disassembler	Yunsup Lee	1	-0/+6
2013-10-17	fix custom-1 rocc encoding	Yunsup Lee	1	-1/+1
2013-10-16	revamp hwacha; now runs in physical mode	Yunsup Lee	1	-6/+0
2013-10-15	Fix bug where xs2 was not being properly respected.	Stephen Twigg	1	-1/+1
2013-09-27	Use WRITE_RD/WRITE_FRD macros to write registers	Andrew Waterman	1	-1/+1
2013-08-13	Implement RoCC and add a dummy RoCC	Andrew Waterman	1	-0/+44