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-rw-r--r--riscv/cachesim.h5
1 files changed, 3 insertions, 2 deletions
diff --git a/riscv/cachesim.h b/riscv/cachesim.h
index b7f9014..d7046f9 100644
--- a/riscv/cachesim.h
+++ b/riscv/cachesim.h
@@ -4,6 +4,7 @@
#define _RISCV_CACHE_SIM_H
#include "memtracer.h"
+#include "common.h"
#include <cstring>
#include <string>
#include <map>
@@ -108,7 +109,7 @@ class icache_sim_t : public cache_memtracer_t
{
public:
icache_sim_t(const char* config) : cache_memtracer_t(config, "I$") {}
- bool interested_in_range(uint64_t begin, uint64_t end, access_type type)
+ bool interested_in_range(uint64_t UNUSED begin, uint64_t UNUSED end, access_type type)
{
return type == FETCH;
}
@@ -122,7 +123,7 @@ class dcache_sim_t : public cache_memtracer_t
{
public:
dcache_sim_t(const char* config) : cache_memtracer_t(config, "D$") {}
- bool interested_in_range(uint64_t begin, uint64_t end, access_type type)
+ bool interested_in_range(uint64_t UNUSED begin, uint64_t UNUSED end, access_type type)
{
return type == LOAD || type == STORE;
}