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-rw-r--r--riscv/decode.h12
-rw-r--r--riscv/execute.h2576
-rw-r--r--riscv/insns/c_add.h2
-rw-r--r--riscv/insns/c_add3.h2
-rw-r--r--riscv/insns/c_addi.h10
-rw-r--r--riscv/insns/c_and3.h2
-rw-r--r--riscv/insns/c_fld.h3
-rw-r--r--riscv/insns/c_flw.h3
-rw-r--r--riscv/insns/c_fsd.h3
-rw-r--r--riscv/insns/c_fsw.h3
-rw-r--r--riscv/insns/c_ld0.h3
-rw-r--r--riscv/insns/c_lw0.h2
-rw-r--r--riscv/insns/c_or3.h2
-rw-r--r--riscv/insns/c_slli.h5
-rw-r--r--riscv/insns/c_slli32.h3
-rw-r--r--riscv/insns/c_slliw.h3
-rw-r--r--riscv/insns/c_srai.h5
-rw-r--r--riscv/insns/c_srai32.h3
-rw-r--r--riscv/insns/c_srli.h5
-rw-r--r--riscv/insns/c_srli32.h3
-rw-r--r--riscv/insns/c_sub.h2
-rw-r--r--riscv/insns/c_sub3.h2
22 files changed, 2642 insertions, 12 deletions
diff --git a/riscv/decode.h b/riscv/decode.h
index f411c10..63e71cd 100644
--- a/riscv/decode.h
+++ b/riscv/decode.h
@@ -210,21 +210,27 @@ private:
#define INSN_IS_RVC(x) (((x) & 0x3) < 0x3)
-#define CRD do_writeback(XPR, (insn.bits >> 5) & 0x1f)
+#define CRD_REGNUM ((insn.bits >> 5) & 0x1f)
+#define CRD do_writeback(XPR, CRD_REGNUM)
#define CRS1 XPR[(insn.bits >> 10) & 0x1f]
#define CRS2 XPR[(insn.bits >> 5) & 0x1f]
#define CIMM6 ((int32_t)((insn.bits >> 10) & 0x3f) << 26 >> 26)
-#define CIMM5 ((int32_t)((insn.bits >> 5) & 0x1f) << 27 >> 27)
+#define CIMM5U ((insn.bits >> 5) & 0x1f)
+#define CIMM5 ((int32_t)CIMM5U << 27 >> 27)
#define CIMM10 ((int32_t)((insn.bits >> 5) & 0x3ff) << 22 >> 22)
#define CBRANCH_TARGET (pc + (CIMM5 << BRANCH_ALIGN_BITS))
#define CJUMP_TARGET (pc + (CIMM10 << JUMP_ALIGN_BITS))
static const int rvc_rs1_regmap[8] = { 20, 21, 2, 3, 4, 5, 6, 7 };
#define rvc_rd_regmap rvc_rs1_regmap
+#define rvc_rs2b_regmap rvc_rs1_regmap
static const int rvc_rs2_regmap[8] = { 20, 21, 2, 3, 4, 5, 6, 0 };
-#define CRDS do_writeback(XPR, rvc_rd_regmap[(insn.bits >> 13) & 0x7])
+#define CRDS XPR[rvc_rd_regmap[(insn.bits >> 13) & 0x7]]
+#define FCRDS FPR[rvc_rd_regmap[(insn.bits >> 13) & 0x7]]
#define CRS1S XPR[rvc_rs1_regmap[(insn.bits >> 10) & 0x7]]
#define CRS2S XPR[rvc_rs2_regmap[(insn.bits >> 13) & 0x7]]
+#define CRS2BS XPR[rvc_rs2b_regmap[(insn.bits >> 5) & 0x7]]
+#define FCRS2S FPR[rvc_rs2_regmap[(insn.bits >> 13) & 0x7]]
// vector stuff
#define VL vl
diff --git a/riscv/execute.h b/riscv/execute.h
index fbc595a..c4ff806 100644
--- a/riscv/execute.h
+++ b/riscv/execute.h
@@ -3,12 +3,12 @@ switch((insn.bits >> 0x0) & 0x7f)
{
case 0x0:
{
- #include "insns/c_addi.h"
+ #include "insns/c_li.h"
break;
}
case 0x1:
{
- #include "insns/c_li.h"
+ #include "insns/c_addi.h"
break;
}
case 0x2:
@@ -669,6 +669,129 @@ switch((insn.bits >> 0x0) & 0x7f)
#include "insns/c_bne.h"
break;
}
+ case 0x12:
+ {
+ switch((insn.bits >> 0x7) & 0x7)
+ {
+ case 0x0:
+ {
+ if((insn.bits & 0x801f) == 0x12)
+ {
+ #include "insns/c_lw0.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x8012)
+ {
+ #include "insns/c_ld0.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x1:
+ {
+ if((insn.bits & 0x801f) == 0x12)
+ {
+ #include "insns/c_lw0.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x8012)
+ {
+ #include "insns/c_ld0.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x2:
+ {
+ if((insn.bits & 0x801f) == 0x12)
+ {
+ #include "insns/c_lw0.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x8012)
+ {
+ #include "insns/c_ld0.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x3:
+ {
+ if((insn.bits & 0x801f) == 0x12)
+ {
+ #include "insns/c_lw0.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x8012)
+ {
+ #include "insns/c_ld0.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x4:
+ {
+ if((insn.bits & 0x801f) == 0x12)
+ {
+ #include "insns/c_lw0.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x8012)
+ {
+ #include "insns/c_ld0.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x5:
+ {
+ if((insn.bits & 0x801f) == 0x12)
+ {
+ #include "insns/c_lw0.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x8012)
+ {
+ #include "insns/c_ld0.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x6:
+ {
+ if((insn.bits & 0x801f) == 0x12)
+ {
+ #include "insns/c_lw0.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x8012)
+ {
+ #include "insns/c_ld0.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x7:
+ {
+ if((insn.bits & 0x801f) == 0x12)
+ {
+ #include "insns/c_lw0.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x8012)
+ {
+ #include "insns/c_ld0.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ default:
+ {
+ throw trap_illegal_instruction;
+ }
+ }
+ break;
+ }
case 0x13:
{
switch((insn.bits >> 0x7) & 0x7)
@@ -733,6 +856,472 @@ switch((insn.bits >> 0x0) & 0x7f)
}
break;
}
+ case 0x14:
+ {
+ #include "insns/c_flw.h"
+ break;
+ }
+ case 0x15:
+ {
+ #include "insns/c_fld.h"
+ break;
+ }
+ case 0x16:
+ {
+ #include "insns/c_fsw.h"
+ break;
+ }
+ case 0x18:
+ {
+ #include "insns/c_fsd.h"
+ break;
+ }
+ case 0x19:
+ {
+ switch((insn.bits >> 0x7) & 0x7)
+ {
+ case 0x0:
+ {
+ if((insn.bits & 0x1c1f) == 0x19)
+ {
+ #include "insns/c_slli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x819)
+ {
+ #include "insns/c_srli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1419)
+ {
+ #include "insns/c_srai32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0xc19)
+ {
+ #include "insns/c_srli32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1819)
+ {
+ #include "insns/c_slliw.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1019)
+ {
+ #include "insns/c_srai.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x419)
+ {
+ #include "insns/c_slli32.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x1:
+ {
+ if((insn.bits & 0x1c1f) == 0x19)
+ {
+ #include "insns/c_slli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x819)
+ {
+ #include "insns/c_srli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1419)
+ {
+ #include "insns/c_srai32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0xc19)
+ {
+ #include "insns/c_srli32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1819)
+ {
+ #include "insns/c_slliw.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1019)
+ {
+ #include "insns/c_srai.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x419)
+ {
+ #include "insns/c_slli32.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x2:
+ {
+ if((insn.bits & 0x1c1f) == 0x19)
+ {
+ #include "insns/c_slli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x819)
+ {
+ #include "insns/c_srli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1419)
+ {
+ #include "insns/c_srai32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0xc19)
+ {
+ #include "insns/c_srli32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1819)
+ {
+ #include "insns/c_slliw.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1019)
+ {
+ #include "insns/c_srai.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x419)
+ {
+ #include "insns/c_slli32.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x3:
+ {
+ if((insn.bits & 0x1c1f) == 0x19)
+ {
+ #include "insns/c_slli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x819)
+ {
+ #include "insns/c_srli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1419)
+ {
+ #include "insns/c_srai32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0xc19)
+ {
+ #include "insns/c_srli32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1819)
+ {
+ #include "insns/c_slliw.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1019)
+ {
+ #include "insns/c_srai.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x419)
+ {
+ #include "insns/c_slli32.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x4:
+ {
+ if((insn.bits & 0x1c1f) == 0x19)
+ {
+ #include "insns/c_slli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x819)
+ {
+ #include "insns/c_srli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1419)
+ {
+ #include "insns/c_srai32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0xc19)
+ {
+ #include "insns/c_srli32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1819)
+ {
+ #include "insns/c_slliw.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1019)
+ {
+ #include "insns/c_srai.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x419)
+ {
+ #include "insns/c_slli32.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x5:
+ {
+ if((insn.bits & 0x1c1f) == 0x19)
+ {
+ #include "insns/c_slli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x819)
+ {
+ #include "insns/c_srli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1419)
+ {
+ #include "insns/c_srai32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0xc19)
+ {
+ #include "insns/c_srli32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1819)
+ {
+ #include "insns/c_slliw.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1019)
+ {
+ #include "insns/c_srai.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x419)
+ {
+ #include "insns/c_slli32.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x6:
+ {
+ if((insn.bits & 0x1c1f) == 0x19)
+ {
+ #include "insns/c_slli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x819)
+ {
+ #include "insns/c_srli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1419)
+ {
+ #include "insns/c_srai32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0xc19)
+ {
+ #include "insns/c_srli32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1819)
+ {
+ #include "insns/c_slliw.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1019)
+ {
+ #include "insns/c_srai.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x419)
+ {
+ #include "insns/c_slli32.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x7:
+ {
+ if((insn.bits & 0x1c1f) == 0x19)
+ {
+ #include "insns/c_slli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x819)
+ {
+ #include "insns/c_srli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1419)
+ {
+ #include "insns/c_srai32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0xc19)
+ {
+ #include "insns/c_srli32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1819)
+ {
+ #include "insns/c_slliw.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1019)
+ {
+ #include "insns/c_srai.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x419)
+ {
+ #include "insns/c_slli32.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ default:
+ {
+ throw trap_illegal_instruction;
+ }
+ }
+ break;
+ }
+ case 0x1a:
+ {
+ switch((insn.bits >> 0x7) & 0x7)
+ {
+ case 0x0:
+ {
+ if((insn.bits & 0x801f) == 0x1a)
+ {
+ #include "insns/c_add.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x801a)
+ {
+ #include "insns/c_sub.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x1:
+ {
+ if((insn.bits & 0x801f) == 0x1a)
+ {
+ #include "insns/c_add.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x801a)
+ {
+ #include "insns/c_sub.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x2:
+ {
+ if((insn.bits & 0x801f) == 0x1a)
+ {
+ #include "insns/c_add.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x801a)
+ {
+ #include "insns/c_sub.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x3:
+ {
+ if((insn.bits & 0x801f) == 0x1a)
+ {
+ #include "insns/c_add.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x801a)
+ {
+ #include "insns/c_sub.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x4:
+ {
+ if((insn.bits & 0x801f) == 0x1a)
+ {
+ #include "insns/c_add.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x801a)
+ {
+ #include "insns/c_sub.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x5:
+ {
+ if((insn.bits & 0x801f) == 0x1a)
+ {
+ #include "insns/c_add.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x801a)
+ {
+ #include "insns/c_sub.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x6:
+ {
+ if((insn.bits & 0x801f) == 0x1a)
+ {
+ #include "insns/c_add.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x801a)
+ {
+ #include "insns/c_sub.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x7:
+ {
+ if((insn.bits & 0x801f) == 0x1a)
+ {
+ #include "insns/c_add.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x801a)
+ {
+ #include "insns/c_sub.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ default:
+ {
+ throw trap_illegal_instruction;
+ }
+ }
+ break;
+ }
case 0x1b:
{
switch((insn.bits >> 0x7) & 0x7)
@@ -772,14 +1361,65 @@ switch((insn.bits >> 0x0) & 0x7f)
}
break;
}
+ case 0x1c:
+ {
+ switch((insn.bits >> 0x7) & 0x7)
+ {
+ case 0x0:
+ {
+ #include "insns/c_add3.h"
+ break;
+ }
+ case 0x1:
+ {
+ #include "insns/c_add3.h"
+ break;
+ }
+ case 0x2:
+ {
+ #include "insns/c_sub3.h"
+ break;
+ }
+ case 0x3:
+ {
+ #include "insns/c_sub3.h"
+ break;
+ }
+ case 0x4:
+ {
+ #include "insns/c_or3.h"
+ break;
+ }
+ case 0x5:
+ {
+ #include "insns/c_or3.h"
+ break;
+ }
+ case 0x6:
+ {
+ #include "insns/c_and3.h"
+ break;
+ }
+ case 0x7:
+ {
+ #include "insns/c_and3.h"
+ break;
+ }
+ default:
+ {
+ throw trap_illegal_instruction;
+ }
+ }
+ break;
+ }
case 0x20:
{
- #include "insns/c_addi.h"
+ #include "insns/c_li.h"
break;
}
case 0x21:
{
- #include "insns/c_li.h"
+ #include "insns/c_addi.h"
break;
}
case 0x22:
@@ -1147,6 +1787,129 @@ switch((insn.bits >> 0x0) & 0x7f)
#include "insns/c_bne.h"
break;
}
+ case 0x32:
+ {
+ switch((insn.bits >> 0x7) & 0x7)
+ {
+ case 0x0:
+ {
+ if((insn.bits & 0x801f) == 0x12)
+ {
+ #include "insns/c_lw0.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x8012)
+ {
+ #include "insns/c_ld0.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x1:
+ {
+ if((insn.bits & 0x801f) == 0x12)
+ {
+ #include "insns/c_lw0.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x8012)
+ {
+ #include "insns/c_ld0.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x2:
+ {
+ if((insn.bits & 0x801f) == 0x12)
+ {
+ #include "insns/c_lw0.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x8012)
+ {
+ #include "insns/c_ld0.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x3:
+ {
+ if((insn.bits & 0x801f) == 0x12)
+ {
+ #include "insns/c_lw0.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x8012)
+ {
+ #include "insns/c_ld0.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x4:
+ {
+ if((insn.bits & 0x801f) == 0x12)
+ {
+ #include "insns/c_lw0.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x8012)
+ {
+ #include "insns/c_ld0.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x5:
+ {
+ if((insn.bits & 0x801f) == 0x12)
+ {
+ #include "insns/c_lw0.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x8012)
+ {
+ #include "insns/c_ld0.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x6:
+ {
+ if((insn.bits & 0x801f) == 0x12)
+ {
+ #include "insns/c_lw0.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x8012)
+ {
+ #include "insns/c_ld0.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x7:
+ {
+ if((insn.bits & 0x801f) == 0x12)
+ {
+ #include "insns/c_lw0.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x8012)
+ {
+ #include "insns/c_ld0.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ default:
+ {
+ throw trap_illegal_instruction;
+ }
+ }
+ break;
+ }
case 0x33:
{
switch((insn.bits >> 0x7) & 0x7)
@@ -1280,11 +2043,477 @@ switch((insn.bits >> 0x0) & 0x7f)
}
break;
}
+ case 0x34:
+ {
+ #include "insns/c_flw.h"
+ break;
+ }
+ case 0x35:
+ {
+ #include "insns/c_fld.h"
+ break;
+ }
+ case 0x36:
+ {
+ #include "insns/c_fsw.h"
+ break;
+ }
case 0x37:
{
#include "insns/lui.h"
break;
}
+ case 0x38:
+ {
+ #include "insns/c_fsd.h"
+ break;
+ }
+ case 0x39:
+ {
+ switch((insn.bits >> 0x7) & 0x7)
+ {
+ case 0x0:
+ {
+ if((insn.bits & 0x1c1f) == 0x19)
+ {
+ #include "insns/c_slli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x819)
+ {
+ #include "insns/c_srli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1419)
+ {
+ #include "insns/c_srai32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0xc19)
+ {
+ #include "insns/c_srli32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1819)
+ {
+ #include "insns/c_slliw.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1019)
+ {
+ #include "insns/c_srai.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x419)
+ {
+ #include "insns/c_slli32.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x1:
+ {
+ if((insn.bits & 0x1c1f) == 0x19)
+ {
+ #include "insns/c_slli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x819)
+ {
+ #include "insns/c_srli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1419)
+ {
+ #include "insns/c_srai32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0xc19)
+ {
+ #include "insns/c_srli32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1819)
+ {
+ #include "insns/c_slliw.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1019)
+ {
+ #include "insns/c_srai.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x419)
+ {
+ #include "insns/c_slli32.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x2:
+ {
+ if((insn.bits & 0x1c1f) == 0x19)
+ {
+ #include "insns/c_slli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x819)
+ {
+ #include "insns/c_srli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1419)
+ {
+ #include "insns/c_srai32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0xc19)
+ {
+ #include "insns/c_srli32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1819)
+ {
+ #include "insns/c_slliw.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1019)
+ {
+ #include "insns/c_srai.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x419)
+ {
+ #include "insns/c_slli32.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x3:
+ {
+ if((insn.bits & 0x1c1f) == 0x19)
+ {
+ #include "insns/c_slli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x819)
+ {
+ #include "insns/c_srli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1419)
+ {
+ #include "insns/c_srai32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0xc19)
+ {
+ #include "insns/c_srli32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1819)
+ {
+ #include "insns/c_slliw.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1019)
+ {
+ #include "insns/c_srai.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x419)
+ {
+ #include "insns/c_slli32.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x4:
+ {
+ if((insn.bits & 0x1c1f) == 0x19)
+ {
+ #include "insns/c_slli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x819)
+ {
+ #include "insns/c_srli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1419)
+ {
+ #include "insns/c_srai32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0xc19)
+ {
+ #include "insns/c_srli32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1819)
+ {
+ #include "insns/c_slliw.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1019)
+ {
+ #include "insns/c_srai.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x419)
+ {
+ #include "insns/c_slli32.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x5:
+ {
+ if((insn.bits & 0x1c1f) == 0x19)
+ {
+ #include "insns/c_slli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x819)
+ {
+ #include "insns/c_srli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1419)
+ {
+ #include "insns/c_srai32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0xc19)
+ {
+ #include "insns/c_srli32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1819)
+ {
+ #include "insns/c_slliw.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1019)
+ {
+ #include "insns/c_srai.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x419)
+ {
+ #include "insns/c_slli32.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x6:
+ {
+ if((insn.bits & 0x1c1f) == 0x19)
+ {
+ #include "insns/c_slli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x819)
+ {
+ #include "insns/c_srli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1419)
+ {
+ #include "insns/c_srai32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0xc19)
+ {
+ #include "insns/c_srli32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1819)
+ {
+ #include "insns/c_slliw.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1019)
+ {
+ #include "insns/c_srai.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x419)
+ {
+ #include "insns/c_slli32.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x7:
+ {
+ if((insn.bits & 0x1c1f) == 0x19)
+ {
+ #include "insns/c_slli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x819)
+ {
+ #include "insns/c_srli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1419)
+ {
+ #include "insns/c_srai32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0xc19)
+ {
+ #include "insns/c_srli32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1819)
+ {
+ #include "insns/c_slliw.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1019)
+ {
+ #include "insns/c_srai.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x419)
+ {
+ #include "insns/c_slli32.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ default:
+ {
+ throw trap_illegal_instruction;
+ }
+ }
+ break;
+ }
+ case 0x3a:
+ {
+ switch((insn.bits >> 0x7) & 0x7)
+ {
+ case 0x0:
+ {
+ if((insn.bits & 0x801f) == 0x1a)
+ {
+ #include "insns/c_add.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x801a)
+ {
+ #include "insns/c_sub.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x1:
+ {
+ if((insn.bits & 0x801f) == 0x1a)
+ {
+ #include "insns/c_add.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x801a)
+ {
+ #include "insns/c_sub.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x2:
+ {
+ if((insn.bits & 0x801f) == 0x1a)
+ {
+ #include "insns/c_add.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x801a)
+ {
+ #include "insns/c_sub.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x3:
+ {
+ if((insn.bits & 0x801f) == 0x1a)
+ {
+ #include "insns/c_add.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x801a)
+ {
+ #include "insns/c_sub.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x4:
+ {
+ if((insn.bits & 0x801f) == 0x1a)
+ {
+ #include "insns/c_add.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x801a)
+ {
+ #include "insns/c_sub.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x5:
+ {
+ if((insn.bits & 0x801f) == 0x1a)
+ {
+ #include "insns/c_add.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x801a)
+ {
+ #include "insns/c_sub.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x6:
+ {
+ if((insn.bits & 0x801f) == 0x1a)
+ {
+ #include "insns/c_add.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x801a)
+ {
+ #include "insns/c_sub.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x7:
+ {
+ if((insn.bits & 0x801f) == 0x1a)
+ {
+ #include "insns/c_add.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x801a)
+ {
+ #include "insns/c_sub.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ default:
+ {
+ throw trap_illegal_instruction;
+ }
+ }
+ break;
+ }
case 0x3b:
{
switch((insn.bits >> 0x7) & 0x7)
@@ -1370,14 +2599,65 @@ switch((insn.bits >> 0x0) & 0x7f)
}
break;
}
+ case 0x3c:
+ {
+ switch((insn.bits >> 0x7) & 0x7)
+ {
+ case 0x0:
+ {
+ #include "insns/c_add3.h"
+ break;
+ }
+ case 0x1:
+ {
+ #include "insns/c_add3.h"
+ break;
+ }
+ case 0x2:
+ {
+ #include "insns/c_sub3.h"
+ break;
+ }
+ case 0x3:
+ {
+ #include "insns/c_sub3.h"
+ break;
+ }
+ case 0x4:
+ {
+ #include "insns/c_or3.h"
+ break;
+ }
+ case 0x5:
+ {
+ #include "insns/c_or3.h"
+ break;
+ }
+ case 0x6:
+ {
+ #include "insns/c_and3.h"
+ break;
+ }
+ case 0x7:
+ {
+ #include "insns/c_and3.h"
+ break;
+ }
+ default:
+ {
+ throw trap_illegal_instruction;
+ }
+ }
+ break;
+ }
case 0x40:
{
- #include "insns/c_addi.h"
+ #include "insns/c_li.h"
break;
}
case 0x41:
{
- #include "insns/c_li.h"
+ #include "insns/c_addi.h"
break;
}
case 0x42:
@@ -1677,6 +2957,129 @@ switch((insn.bits >> 0x0) & 0x7f)
#include "insns/c_bne.h"
break;
}
+ case 0x52:
+ {
+ switch((insn.bits >> 0x7) & 0x7)
+ {
+ case 0x0:
+ {
+ if((insn.bits & 0x801f) == 0x12)
+ {
+ #include "insns/c_lw0.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x8012)
+ {
+ #include "insns/c_ld0.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x1:
+ {
+ if((insn.bits & 0x801f) == 0x12)
+ {
+ #include "insns/c_lw0.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x8012)
+ {
+ #include "insns/c_ld0.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x2:
+ {
+ if((insn.bits & 0x801f) == 0x12)
+ {
+ #include "insns/c_lw0.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x8012)
+ {
+ #include "insns/c_ld0.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x3:
+ {
+ if((insn.bits & 0x801f) == 0x12)
+ {
+ #include "insns/c_lw0.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x8012)
+ {
+ #include "insns/c_ld0.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x4:
+ {
+ if((insn.bits & 0x801f) == 0x12)
+ {
+ #include "insns/c_lw0.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x8012)
+ {
+ #include "insns/c_ld0.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x5:
+ {
+ if((insn.bits & 0x801f) == 0x12)
+ {
+ #include "insns/c_lw0.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x8012)
+ {
+ #include "insns/c_ld0.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x6:
+ {
+ if((insn.bits & 0x801f) == 0x12)
+ {
+ #include "insns/c_lw0.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x8012)
+ {
+ #include "insns/c_ld0.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x7:
+ {
+ if((insn.bits & 0x801f) == 0x12)
+ {
+ #include "insns/c_lw0.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x8012)
+ {
+ #include "insns/c_ld0.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ default:
+ {
+ throw trap_illegal_instruction;
+ }
+ }
+ break;
+ }
case 0x53:
{
switch((insn.bits >> 0x7) & 0x7)
@@ -2079,14 +3482,531 @@ switch((insn.bits >> 0x0) & 0x7f)
}
break;
}
+ case 0x54:
+ {
+ #include "insns/c_flw.h"
+ break;
+ }
+ case 0x55:
+ {
+ #include "insns/c_fld.h"
+ break;
+ }
+ case 0x56:
+ {
+ #include "insns/c_fsw.h"
+ break;
+ }
+ case 0x58:
+ {
+ #include "insns/c_fsd.h"
+ break;
+ }
+ case 0x59:
+ {
+ switch((insn.bits >> 0x7) & 0x7)
+ {
+ case 0x0:
+ {
+ if((insn.bits & 0x1c1f) == 0x19)
+ {
+ #include "insns/c_slli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x819)
+ {
+ #include "insns/c_srli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1419)
+ {
+ #include "insns/c_srai32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0xc19)
+ {
+ #include "insns/c_srli32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1819)
+ {
+ #include "insns/c_slliw.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1019)
+ {
+ #include "insns/c_srai.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x419)
+ {
+ #include "insns/c_slli32.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x1:
+ {
+ if((insn.bits & 0x1c1f) == 0x19)
+ {
+ #include "insns/c_slli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x819)
+ {
+ #include "insns/c_srli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1419)
+ {
+ #include "insns/c_srai32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0xc19)
+ {
+ #include "insns/c_srli32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1819)
+ {
+ #include "insns/c_slliw.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1019)
+ {
+ #include "insns/c_srai.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x419)
+ {
+ #include "insns/c_slli32.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x2:
+ {
+ if((insn.bits & 0x1c1f) == 0x19)
+ {
+ #include "insns/c_slli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x819)
+ {
+ #include "insns/c_srli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1419)
+ {
+ #include "insns/c_srai32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0xc19)
+ {
+ #include "insns/c_srli32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1819)
+ {
+ #include "insns/c_slliw.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1019)
+ {
+ #include "insns/c_srai.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x419)
+ {
+ #include "insns/c_slli32.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x3:
+ {
+ if((insn.bits & 0x1c1f) == 0x19)
+ {
+ #include "insns/c_slli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x819)
+ {
+ #include "insns/c_srli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1419)
+ {
+ #include "insns/c_srai32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0xc19)
+ {
+ #include "insns/c_srli32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1819)
+ {
+ #include "insns/c_slliw.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1019)
+ {
+ #include "insns/c_srai.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x419)
+ {
+ #include "insns/c_slli32.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x4:
+ {
+ if((insn.bits & 0x1c1f) == 0x19)
+ {
+ #include "insns/c_slli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x819)
+ {
+ #include "insns/c_srli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1419)
+ {
+ #include "insns/c_srai32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0xc19)
+ {
+ #include "insns/c_srli32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1819)
+ {
+ #include "insns/c_slliw.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1019)
+ {
+ #include "insns/c_srai.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x419)
+ {
+ #include "insns/c_slli32.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x5:
+ {
+ if((insn.bits & 0x1c1f) == 0x19)
+ {
+ #include "insns/c_slli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x819)
+ {
+ #include "insns/c_srli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1419)
+ {
+ #include "insns/c_srai32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0xc19)
+ {
+ #include "insns/c_srli32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1819)
+ {
+ #include "insns/c_slliw.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1019)
+ {
+ #include "insns/c_srai.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x419)
+ {
+ #include "insns/c_slli32.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x6:
+ {
+ if((insn.bits & 0x1c1f) == 0x19)
+ {
+ #include "insns/c_slli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x819)
+ {
+ #include "insns/c_srli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1419)
+ {
+ #include "insns/c_srai32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0xc19)
+ {
+ #include "insns/c_srli32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1819)
+ {
+ #include "insns/c_slliw.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1019)
+ {
+ #include "insns/c_srai.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x419)
+ {
+ #include "insns/c_slli32.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x7:
+ {
+ if((insn.bits & 0x1c1f) == 0x19)
+ {
+ #include "insns/c_slli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x819)
+ {
+ #include "insns/c_srli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1419)
+ {
+ #include "insns/c_srai32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0xc19)
+ {
+ #include "insns/c_srli32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1819)
+ {
+ #include "insns/c_slliw.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1019)
+ {
+ #include "insns/c_srai.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x419)
+ {
+ #include "insns/c_slli32.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ default:
+ {
+ throw trap_illegal_instruction;
+ }
+ }
+ break;
+ }
+ case 0x5a:
+ {
+ switch((insn.bits >> 0x7) & 0x7)
+ {
+ case 0x0:
+ {
+ if((insn.bits & 0x801f) == 0x1a)
+ {
+ #include "insns/c_add.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x801a)
+ {
+ #include "insns/c_sub.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x1:
+ {
+ if((insn.bits & 0x801f) == 0x1a)
+ {
+ #include "insns/c_add.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x801a)
+ {
+ #include "insns/c_sub.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x2:
+ {
+ if((insn.bits & 0x801f) == 0x1a)
+ {
+ #include "insns/c_add.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x801a)
+ {
+ #include "insns/c_sub.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x3:
+ {
+ if((insn.bits & 0x801f) == 0x1a)
+ {
+ #include "insns/c_add.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x801a)
+ {
+ #include "insns/c_sub.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x4:
+ {
+ if((insn.bits & 0x801f) == 0x1a)
+ {
+ #include "insns/c_add.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x801a)
+ {
+ #include "insns/c_sub.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x5:
+ {
+ if((insn.bits & 0x801f) == 0x1a)
+ {
+ #include "insns/c_add.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x801a)
+ {
+ #include "insns/c_sub.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x6:
+ {
+ if((insn.bits & 0x801f) == 0x1a)
+ {
+ #include "insns/c_add.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x801a)
+ {
+ #include "insns/c_sub.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x7:
+ {
+ if((insn.bits & 0x801f) == 0x1a)
+ {
+ #include "insns/c_add.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x801a)
+ {
+ #include "insns/c_sub.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ default:
+ {
+ throw trap_illegal_instruction;
+ }
+ }
+ break;
+ }
+ case 0x5c:
+ {
+ switch((insn.bits >> 0x7) & 0x7)
+ {
+ case 0x0:
+ {
+ #include "insns/c_add3.h"
+ break;
+ }
+ case 0x1:
+ {
+ #include "insns/c_add3.h"
+ break;
+ }
+ case 0x2:
+ {
+ #include "insns/c_sub3.h"
+ break;
+ }
+ case 0x3:
+ {
+ #include "insns/c_sub3.h"
+ break;
+ }
+ case 0x4:
+ {
+ #include "insns/c_or3.h"
+ break;
+ }
+ case 0x5:
+ {
+ #include "insns/c_or3.h"
+ break;
+ }
+ case 0x6:
+ {
+ #include "insns/c_and3.h"
+ break;
+ }
+ case 0x7:
+ {
+ #include "insns/c_and3.h"
+ break;
+ }
+ default:
+ {
+ throw trap_illegal_instruction;
+ }
+ }
+ break;
+ }
case 0x60:
{
- #include "insns/c_addi.h"
+ #include "insns/c_li.h"
break;
}
case 0x61:
{
- #include "insns/c_li.h"
+ #include "insns/c_addi.h"
break;
}
case 0x62:
@@ -2348,6 +4268,129 @@ switch((insn.bits >> 0x0) & 0x7f)
#include "insns/c_bne.h"
break;
}
+ case 0x72:
+ {
+ switch((insn.bits >> 0x7) & 0x7)
+ {
+ case 0x0:
+ {
+ if((insn.bits & 0x801f) == 0x12)
+ {
+ #include "insns/c_lw0.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x8012)
+ {
+ #include "insns/c_ld0.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x1:
+ {
+ if((insn.bits & 0x801f) == 0x12)
+ {
+ #include "insns/c_lw0.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x8012)
+ {
+ #include "insns/c_ld0.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x2:
+ {
+ if((insn.bits & 0x801f) == 0x12)
+ {
+ #include "insns/c_lw0.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x8012)
+ {
+ #include "insns/c_ld0.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x3:
+ {
+ if((insn.bits & 0x801f) == 0x12)
+ {
+ #include "insns/c_lw0.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x8012)
+ {
+ #include "insns/c_ld0.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x4:
+ {
+ if((insn.bits & 0x801f) == 0x12)
+ {
+ #include "insns/c_lw0.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x8012)
+ {
+ #include "insns/c_ld0.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x5:
+ {
+ if((insn.bits & 0x801f) == 0x12)
+ {
+ #include "insns/c_lw0.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x8012)
+ {
+ #include "insns/c_ld0.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x6:
+ {
+ if((insn.bits & 0x801f) == 0x12)
+ {
+ #include "insns/c_lw0.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x8012)
+ {
+ #include "insns/c_ld0.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x7:
+ {
+ if((insn.bits & 0x801f) == 0x12)
+ {
+ #include "insns/c_lw0.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x8012)
+ {
+ #include "insns/c_ld0.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ default:
+ {
+ throw trap_illegal_instruction;
+ }
+ }
+ break;
+ }
case 0x73:
{
switch((insn.bits >> 0x7) & 0x7)
@@ -2382,6 +4425,21 @@ switch((insn.bits >> 0x0) & 0x7f)
}
break;
}
+ case 0x74:
+ {
+ #include "insns/c_flw.h"
+ break;
+ }
+ case 0x75:
+ {
+ #include "insns/c_fld.h"
+ break;
+ }
+ case 0x76:
+ {
+ #include "insns/c_fsw.h"
+ break;
+ }
case 0x77:
{
switch((insn.bits >> 0x7) & 0x7)
@@ -2429,6 +4487,457 @@ switch((insn.bits >> 0x0) & 0x7f)
}
break;
}
+ case 0x78:
+ {
+ #include "insns/c_fsd.h"
+ break;
+ }
+ case 0x79:
+ {
+ switch((insn.bits >> 0x7) & 0x7)
+ {
+ case 0x0:
+ {
+ if((insn.bits & 0x1c1f) == 0x19)
+ {
+ #include "insns/c_slli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x819)
+ {
+ #include "insns/c_srli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1419)
+ {
+ #include "insns/c_srai32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0xc19)
+ {
+ #include "insns/c_srli32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1819)
+ {
+ #include "insns/c_slliw.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1019)
+ {
+ #include "insns/c_srai.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x419)
+ {
+ #include "insns/c_slli32.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x1:
+ {
+ if((insn.bits & 0x1c1f) == 0x19)
+ {
+ #include "insns/c_slli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x819)
+ {
+ #include "insns/c_srli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1419)
+ {
+ #include "insns/c_srai32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0xc19)
+ {
+ #include "insns/c_srli32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1819)
+ {
+ #include "insns/c_slliw.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1019)
+ {
+ #include "insns/c_srai.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x419)
+ {
+ #include "insns/c_slli32.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x2:
+ {
+ if((insn.bits & 0x1c1f) == 0x19)
+ {
+ #include "insns/c_slli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x819)
+ {
+ #include "insns/c_srli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1419)
+ {
+ #include "insns/c_srai32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0xc19)
+ {
+ #include "insns/c_srli32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1819)
+ {
+ #include "insns/c_slliw.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1019)
+ {
+ #include "insns/c_srai.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x419)
+ {
+ #include "insns/c_slli32.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x3:
+ {
+ if((insn.bits & 0x1c1f) == 0x19)
+ {
+ #include "insns/c_slli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x819)
+ {
+ #include "insns/c_srli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1419)
+ {
+ #include "insns/c_srai32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0xc19)
+ {
+ #include "insns/c_srli32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1819)
+ {
+ #include "insns/c_slliw.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1019)
+ {
+ #include "insns/c_srai.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x419)
+ {
+ #include "insns/c_slli32.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x4:
+ {
+ if((insn.bits & 0x1c1f) == 0x19)
+ {
+ #include "insns/c_slli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x819)
+ {
+ #include "insns/c_srli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1419)
+ {
+ #include "insns/c_srai32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0xc19)
+ {
+ #include "insns/c_srli32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1819)
+ {
+ #include "insns/c_slliw.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1019)
+ {
+ #include "insns/c_srai.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x419)
+ {
+ #include "insns/c_slli32.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x5:
+ {
+ if((insn.bits & 0x1c1f) == 0x19)
+ {
+ #include "insns/c_slli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x819)
+ {
+ #include "insns/c_srli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1419)
+ {
+ #include "insns/c_srai32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0xc19)
+ {
+ #include "insns/c_srli32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1819)
+ {
+ #include "insns/c_slliw.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1019)
+ {
+ #include "insns/c_srai.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x419)
+ {
+ #include "insns/c_slli32.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x6:
+ {
+ if((insn.bits & 0x1c1f) == 0x19)
+ {
+ #include "insns/c_slli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x819)
+ {
+ #include "insns/c_srli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1419)
+ {
+ #include "insns/c_srai32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0xc19)
+ {
+ #include "insns/c_srli32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1819)
+ {
+ #include "insns/c_slliw.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1019)
+ {
+ #include "insns/c_srai.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x419)
+ {
+ #include "insns/c_slli32.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x7:
+ {
+ if((insn.bits & 0x1c1f) == 0x19)
+ {
+ #include "insns/c_slli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x819)
+ {
+ #include "insns/c_srli.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1419)
+ {
+ #include "insns/c_srai32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0xc19)
+ {
+ #include "insns/c_srli32.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1819)
+ {
+ #include "insns/c_slliw.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x1019)
+ {
+ #include "insns/c_srai.h"
+ break;
+ }
+ if((insn.bits & 0x1c1f) == 0x419)
+ {
+ #include "insns/c_slli32.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ default:
+ {
+ throw trap_illegal_instruction;
+ }
+ }
+ break;
+ }
+ case 0x7a:
+ {
+ switch((insn.bits >> 0x7) & 0x7)
+ {
+ case 0x0:
+ {
+ if((insn.bits & 0x801f) == 0x1a)
+ {
+ #include "insns/c_add.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x801a)
+ {
+ #include "insns/c_sub.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x1:
+ {
+ if((insn.bits & 0x801f) == 0x1a)
+ {
+ #include "insns/c_add.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x801a)
+ {
+ #include "insns/c_sub.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x2:
+ {
+ if((insn.bits & 0x801f) == 0x1a)
+ {
+ #include "insns/c_add.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x801a)
+ {
+ #include "insns/c_sub.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x3:
+ {
+ if((insn.bits & 0x801f) == 0x1a)
+ {
+ #include "insns/c_add.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x801a)
+ {
+ #include "insns/c_sub.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x4:
+ {
+ if((insn.bits & 0x801f) == 0x1a)
+ {
+ #include "insns/c_add.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x801a)
+ {
+ #include "insns/c_sub.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x5:
+ {
+ if((insn.bits & 0x801f) == 0x1a)
+ {
+ #include "insns/c_add.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x801a)
+ {
+ #include "insns/c_sub.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x6:
+ {
+ if((insn.bits & 0x801f) == 0x1a)
+ {
+ #include "insns/c_add.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x801a)
+ {
+ #include "insns/c_sub.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ case 0x7:
+ {
+ if((insn.bits & 0x801f) == 0x1a)
+ {
+ #include "insns/c_add.h"
+ break;
+ }
+ if((insn.bits & 0x801f) == 0x801a)
+ {
+ #include "insns/c_sub.h"
+ break;
+ }
+ throw trap_illegal_instruction;
+ }
+ default:
+ {
+ throw trap_illegal_instruction;
+ }
+ }
+ break;
+ }
case 0x7b:
{
switch((insn.bits >> 0x7) & 0x7)
@@ -2494,6 +5003,57 @@ switch((insn.bits >> 0x0) & 0x7f)
}
break;
}
+ case 0x7c:
+ {
+ switch((insn.bits >> 0x7) & 0x7)
+ {
+ case 0x0:
+ {
+ #include "insns/c_add3.h"
+ break;
+ }
+ case 0x1:
+ {
+ #include "insns/c_add3.h"
+ break;
+ }
+ case 0x2:
+ {
+ #include "insns/c_sub3.h"
+ break;
+ }
+ case 0x3:
+ {
+ #include "insns/c_sub3.h"
+ break;
+ }
+ case 0x4:
+ {
+ #include "insns/c_or3.h"
+ break;
+ }
+ case 0x5:
+ {
+ #include "insns/c_or3.h"
+ break;
+ }
+ case 0x6:
+ {
+ #include "insns/c_and3.h"
+ break;
+ }
+ case 0x7:
+ {
+ #include "insns/c_and3.h"
+ break;
+ }
+ default:
+ {
+ throw trap_illegal_instruction;
+ }
+ }
+ break;
+ }
default:
{
throw trap_illegal_instruction;
diff --git a/riscv/insns/c_add.h b/riscv/insns/c_add.h
new file mode 100644
index 0000000..2170d69
--- /dev/null
+++ b/riscv/insns/c_add.h
@@ -0,0 +1,2 @@
+require_rvc;
+CRD = CRS1 + CRS2;
diff --git a/riscv/insns/c_add3.h b/riscv/insns/c_add3.h
new file mode 100644
index 0000000..914c85d
--- /dev/null
+++ b/riscv/insns/c_add3.h
@@ -0,0 +1,2 @@
+require_rvc;
+CRDS = CRS1S + CRS2BS;
diff --git a/riscv/insns/c_addi.h b/riscv/insns/c_addi.h
index 4a5a0af..c716f69 100644
--- a/riscv/insns/c_addi.h
+++ b/riscv/insns/c_addi.h
@@ -1,2 +1,10 @@
require_rvc;
-CRD = sext_xprlen(CRS2 + CIMM6);
+if(CRD_REGNUM == 0)
+{
+ reg_t temp = npc;
+ npc = CRS1;
+ if(CIMM6 & 0x20)
+ RA = temp;
+}
+else
+ CRD = sext_xprlen(CRS2 + CIMM6);
diff --git a/riscv/insns/c_and3.h b/riscv/insns/c_and3.h
new file mode 100644
index 0000000..b506d6a
--- /dev/null
+++ b/riscv/insns/c_and3.h
@@ -0,0 +1,2 @@
+require_rvc;
+CRDS = CRS1S & CRS2BS;
diff --git a/riscv/insns/c_fld.h b/riscv/insns/c_fld.h
new file mode 100644
index 0000000..a726039
--- /dev/null
+++ b/riscv/insns/c_fld.h
@@ -0,0 +1,3 @@
+require_rvc;
+require_fp;
+FCRDS = mmu.load_int64(CRS1S+CIMM5*8);
diff --git a/riscv/insns/c_flw.h b/riscv/insns/c_flw.h
new file mode 100644
index 0000000..cdb7221
--- /dev/null
+++ b/riscv/insns/c_flw.h
@@ -0,0 +1,3 @@
+require_rvc;
+require_fp;
+FCRDS = mmu.load_int32(CRS1S+CIMM5*4);
diff --git a/riscv/insns/c_fsd.h b/riscv/insns/c_fsd.h
new file mode 100644
index 0000000..20814fd
--- /dev/null
+++ b/riscv/insns/c_fsd.h
@@ -0,0 +1,3 @@
+require_rvc;
+require_fp;
+mmu.store_uint64(CRS1S+CIMM5*8, FCRS2S);
diff --git a/riscv/insns/c_fsw.h b/riscv/insns/c_fsw.h
new file mode 100644
index 0000000..1d21629
--- /dev/null
+++ b/riscv/insns/c_fsw.h
@@ -0,0 +1,3 @@
+require_rvc;
+require_fp;
+mmu.store_uint32(CRS1S+CIMM5*4, FCRS2S);
diff --git a/riscv/insns/c_ld0.h b/riscv/insns/c_ld0.h
new file mode 100644
index 0000000..f51a966
--- /dev/null
+++ b/riscv/insns/c_ld0.h
@@ -0,0 +1,3 @@
+require_rvc;
+require_xpr64;
+CRD = mmu.load_int64(CRS1);
diff --git a/riscv/insns/c_lw0.h b/riscv/insns/c_lw0.h
new file mode 100644
index 0000000..d263a80
--- /dev/null
+++ b/riscv/insns/c_lw0.h
@@ -0,0 +1,2 @@
+require_rvc;
+CRD = mmu.load_int32(CRS1);
diff --git a/riscv/insns/c_or3.h b/riscv/insns/c_or3.h
new file mode 100644
index 0000000..143e2ae
--- /dev/null
+++ b/riscv/insns/c_or3.h
@@ -0,0 +1,2 @@
+require_rvc;
+CRDS = CRS1S | CRS2BS;
diff --git a/riscv/insns/c_slli.h b/riscv/insns/c_slli.h
new file mode 100644
index 0000000..5026767
--- /dev/null
+++ b/riscv/insns/c_slli.h
@@ -0,0 +1,5 @@
+require_rvc;
+if(xpr64)
+ CRDS = CRDS << CIMM5U;
+else
+ CRDS = sext32(CRDS << CIMM5U);
diff --git a/riscv/insns/c_slli32.h b/riscv/insns/c_slli32.h
new file mode 100644
index 0000000..1e3e958
--- /dev/null
+++ b/riscv/insns/c_slli32.h
@@ -0,0 +1,3 @@
+require_rvc;
+require_xpr64;
+CRDS = CRDS << (32+CIMM5U);
diff --git a/riscv/insns/c_slliw.h b/riscv/insns/c_slliw.h
new file mode 100644
index 0000000..9e428f5
--- /dev/null
+++ b/riscv/insns/c_slliw.h
@@ -0,0 +1,3 @@
+require_rvc;
+require_xpr64;
+CRDS = sext32(CRDS << CIMM5U);
diff --git a/riscv/insns/c_srai.h b/riscv/insns/c_srai.h
new file mode 100644
index 0000000..aa33424
--- /dev/null
+++ b/riscv/insns/c_srai.h
@@ -0,0 +1,5 @@
+require_rvc;
+if(xpr64)
+ CRDS = sreg_t(CRDS) >> CIMM5U;
+else
+ CRDS = sext32(int32_t(CRDS) >> CIMM5U);
diff --git a/riscv/insns/c_srai32.h b/riscv/insns/c_srai32.h
new file mode 100644
index 0000000..ca7b024
--- /dev/null
+++ b/riscv/insns/c_srai32.h
@@ -0,0 +1,3 @@
+require_rvc;
+require_xpr64;
+CRDS = sreg_t(CRDS) >> (32+CIMM5U);
diff --git a/riscv/insns/c_srli.h b/riscv/insns/c_srli.h
new file mode 100644
index 0000000..56e0681
--- /dev/null
+++ b/riscv/insns/c_srli.h
@@ -0,0 +1,5 @@
+require_rvc;
+if(xpr64)
+ CRDS = CRDS >> CIMM5U;
+else
+ CRDS = sext32(uint32_t(CRDS) >> CIMM5U);
diff --git a/riscv/insns/c_srli32.h b/riscv/insns/c_srli32.h
new file mode 100644
index 0000000..4f5b8ea
--- /dev/null
+++ b/riscv/insns/c_srli32.h
@@ -0,0 +1,3 @@
+require_rvc;
+require_xpr64;
+CRDS = CRDS >> (32+CIMM5U);
diff --git a/riscv/insns/c_sub.h b/riscv/insns/c_sub.h
new file mode 100644
index 0000000..9fd8932
--- /dev/null
+++ b/riscv/insns/c_sub.h
@@ -0,0 +1,2 @@
+require_rvc;
+CRD = CRS1 - CRS2;
diff --git a/riscv/insns/c_sub3.h b/riscv/insns/c_sub3.h
new file mode 100644
index 0000000..53afc84
--- /dev/null
+++ b/riscv/insns/c_sub3.h
@@ -0,0 +1,2 @@
+require_rvc;
+CRDS = CRS1S - CRS2BS;
generated by cgit v1.1 at 2024-11-18 20:09:30 +0000