diff options
| -rw-r--r-- | riscv/encoding.h | 45 | ||||
| -rw-r--r-- | riscv/insns/vadc_vim.h (renamed from riscv/insns/vadc_vi.h) | 0 | ||||
| -rw-r--r-- | riscv/insns/vadc_vvm.h (renamed from riscv/insns/vadc_vv.h) | 0 | ||||
| -rw-r--r-- | riscv/insns/vadc_vxm.h (renamed from riscv/insns/vadc_vx.h) | 0 | ||||
| -rw-r--r-- | riscv/insns/vsbc_vvm.h (renamed from riscv/insns/vsbc_vv.h) | 0 | ||||
| -rw-r--r-- | riscv/insns/vsbc_vxm.h (renamed from riscv/insns/vsbc_vx.h) | 0 | ||||
| -rw-r--r-- | riscv/riscv.mk.in | 10 | ||||
| -rw-r--r-- | spike_main/disasm.cc | 26 |
8 files changed, 56 insertions, 25 deletions
diff --git a/riscv/encoding.h b/riscv/encoding.h index efc70fe..e295753 100644 --- a/riscv/encoding.h +++ b/riscv/encoding.h @@ -1034,10 +1034,14 @@ #define MASK_VSLIDEUP_VX 0xfc00707f #define MATCH_VSLIDEDOWN_VX 0x3c004057 #define MASK_VSLIDEDOWN_VX 0xfc00707f -#define MATCH_VADC_VX 0x42004057 -#define MASK_VADC_VX 0xfe00707f -#define MATCH_VSBC_VX 0x4a004057 -#define MASK_VSBC_VX 0xfe00707f +#define MATCH_VADC_VXM 0x42004057 +#define MASK_VADC_VXM 0xfe00707f +#define MATCH_VMADC_VXM 0x46004057 +#define MASK_VMADC_VXM 0xfe00707f +#define MATCH_VSBC_VXM 0x4a004057 +#define MASK_VSBC_VXM 0xfe00707f +#define MATCH_VMSBC_VXM 0x4e004057 +#define MASK_VMSBC_VXM 0xfe00707f #define MATCH_VMERGE_VXM 0x5c004057 #define MASK_VMERGE_VXM 0xfe00707f #define MATCH_VMV_V_X 0x5e004057 @@ -1118,10 +1122,14 @@ #define MASK_VXOR_VV 0xfc00707f #define MATCH_VRGATHER_VV 0x30000057 #define MASK_VRGATHER_VV 0xfc00707f -#define MATCH_VADC_VV 0x42000057 -#define MASK_VADC_VV 0xfe00707f -#define MATCH_VSBC_VV 0x4a000057 -#define MASK_VSBC_VV 0xfe00707f +#define MATCH_VADC_VVM 0x42000057 +#define MASK_VADC_VVM 0xfe00707f +#define MATCH_VMADC_VVM 0x46000057 +#define MASK_VMADC_VVM 0xfe00707f +#define MATCH_VSBC_VVM 0x4a000057 +#define MASK_VSBC_VVM 0xfe00707f +#define MATCH_VMSBC_VVM 0x4e000057 +#define MASK_VMSBC_VVM 0xfe00707f #define MATCH_VMERGE_VVM 0x5c000057 #define MASK_VMERGE_VVM 0xfe00707f #define MATCH_VMV_V_V 0x5e000057 @@ -1202,8 +1210,10 @@ #define MASK_VSLIDEUP_VI 0xfc00707f #define MATCH_VSLIDEDOWN_VI 0x3c003057 #define MASK_VSLIDEDOWN_VI 0xfc00707f -#define MATCH_VADC_VI 0x42003057 -#define MASK_VADC_VI 0xfe00707f +#define MATCH_VADC_VIM 0x42003057 +#define MASK_VADC_VIM 0xfe00707f +#define MATCH_VMADC_VIM 0x46003057 +#define MASK_VMADC_VIM 0xfe00707f #define MATCH_VMERGE_VIM 0x5e003057 #define MASK_VMERGE_VIM 0xfe00707f #define MATCH_VMV_V_I 0x5c003057 @@ -2136,8 +2146,10 @@ DECLARE_INSN(vxor_vx, MATCH_VXOR_VX, MASK_VXOR_VX) DECLARE_INSN(vrgather_vx, MATCH_VRGATHER_VX, MASK_VRGATHER_VX) DECLARE_INSN(vslideup_vx, MATCH_VSLIDEUP_VX, MASK_VSLIDEUP_VX) DECLARE_INSN(vslidedown_vx, MATCH_VSLIDEDOWN_VX, MASK_VSLIDEDOWN_VX) -DECLARE_INSN(vadc_vx, MATCH_VADC_VX, MASK_VADC_VX) -DECLARE_INSN(vsbc_vx, MATCH_VSBC_VX, MASK_VSBC_VX) +DECLARE_INSN(vadc_vxm, MATCH_VADC_VXM, MASK_VADC_VXM) +DECLARE_INSN(vmadc_vxm, MATCH_VMADC_VXM, MASK_VMADC_VXM) +DECLARE_INSN(vsbc_vxm, MATCH_VSBC_VXM, MASK_VSBC_VXM) +DECLARE_INSN(vmsbc_vxm, MATCH_VMSBC_VXM, MASK_VMSBC_VXM) DECLARE_INSN(vmerge_vxm, MATCH_VMERGE_VXM, MASK_VMERGE_VXM) DECLARE_INSN(vmv_v_x, MATCH_VMV_V_X, MASK_VMV_V_X) DECLARE_INSN(vmseq_vx, MATCH_VMSEQ_VX, MASK_VMSEQ_VX) @@ -2178,8 +2190,10 @@ DECLARE_INSN(vand_vv, MATCH_VAND_VV, MASK_VAND_VV) DECLARE_INSN(vor_vv, MATCH_VOR_VV, MASK_VOR_VV) DECLARE_INSN(vxor_vv, MATCH_VXOR_VV, MASK_VXOR_VV) DECLARE_INSN(vrgather_vv, MATCH_VRGATHER_VV, MASK_VRGATHER_VV) -DECLARE_INSN(vadc_vv, MATCH_VADC_VV, MASK_VADC_VV) -DECLARE_INSN(vsbc_vv, MATCH_VSBC_VV, MASK_VSBC_VV) +DECLARE_INSN(vadc_vvm, MATCH_VADC_VVM, MASK_VADC_VVM) +DECLARE_INSN(vmadc_vvm, MATCH_VMADC_VVM, MASK_VMADC_VVM) +DECLARE_INSN(vsbc_vvm, MATCH_VSBC_VVM, MASK_VSBC_VVM) +DECLARE_INSN(vmsbc_vvm, MATCH_VMSBC_VVM, MASK_VMSBC_VVM) DECLARE_INSN(vmerge_vvm, MATCH_VMERGE_VVM, MASK_VMERGE_VVM) DECLARE_INSN(vmv_v_v, MATCH_VMV_V_V, MASK_VMV_V_V) DECLARE_INSN(vmseq_vv, MATCH_VMSEQ_VV, MASK_VMSEQ_VV) @@ -2220,7 +2234,8 @@ DECLARE_INSN(vxor_vi, MATCH_VXOR_VI, MASK_VXOR_VI) DECLARE_INSN(vrgather_vi, MATCH_VRGATHER_VI, MASK_VRGATHER_VI) DECLARE_INSN(vslideup_vi, MATCH_VSLIDEUP_VI, MASK_VSLIDEUP_VI) DECLARE_INSN(vslidedown_vi, MATCH_VSLIDEDOWN_VI, MASK_VSLIDEDOWN_VI) -DECLARE_INSN(vadc_vi, MATCH_VADC_VI, MASK_VADC_VI) +DECLARE_INSN(vadc_vim, MATCH_VADC_VIM, MASK_VADC_VIM) +DECLARE_INSN(vmadc_vim, MATCH_VMADC_VIM, MASK_VMADC_VIM) DECLARE_INSN(vmerge_vim, MATCH_VMERGE_VIM, MASK_VMERGE_VIM) DECLARE_INSN(vmv_v_i, MATCH_VMV_V_I, MASK_VMV_V_I) DECLARE_INSN(vmseq_vi, MATCH_VMSEQ_VI, MASK_VMSEQ_VI) diff --git a/riscv/insns/vadc_vi.h b/riscv/insns/vadc_vim.h index 62fea00..62fea00 100644 --- a/riscv/insns/vadc_vi.h +++ b/riscv/insns/vadc_vim.h diff --git a/riscv/insns/vadc_vv.h b/riscv/insns/vadc_vvm.h index 5e85e45..5e85e45 100644 --- a/riscv/insns/vadc_vv.h +++ b/riscv/insns/vadc_vvm.h diff --git a/riscv/insns/vadc_vx.h b/riscv/insns/vadc_vxm.h index 59a1dff..59a1dff 100644 --- a/riscv/insns/vadc_vx.h +++ b/riscv/insns/vadc_vxm.h diff --git a/riscv/insns/vsbc_vv.h b/riscv/insns/vsbc_vvm.h index d5fe37d..d5fe37d 100644 --- a/riscv/insns/vsbc_vv.h +++ b/riscv/insns/vsbc_vvm.h diff --git a/riscv/insns/vsbc_vx.h b/riscv/insns/vsbc_vxm.h index 4d6c911..4d6c911 100644 --- a/riscv/insns/vsbc_vx.h +++ b/riscv/insns/vsbc_vxm.h diff --git a/riscv/riscv.mk.in b/riscv/riscv.mk.in index 0f7493a..e2faa26 100644 --- a/riscv/riscv.mk.in +++ b/riscv/riscv.mk.in @@ -295,9 +295,9 @@ riscv_insn_ext_v_alu_int = \ vaadd_vi \ vaadd_vv \ vaadd_vx \ - vadc_vi \ - vadc_vv \ - vadc_vx \ + vadc_vim \ + vadc_vvm \ + vadc_vxm \ vadd_vi \ vadd_vv \ vadd_vx \ @@ -418,8 +418,8 @@ riscv_insn_ext_v_alu_int = \ vsaddu_vi \ vsaddu_vv \ vsaddu_vx \ - vsbc_vv \ - vsbc_vx \ + vsbc_vvm \ + vsbc_vxm \ vslide1down_vx \ vslide1up_vx \ vslidedown_vi \ diff --git a/spike_main/disasm.cc b/spike_main/disasm.cc index 6b876ae..fd2b423 100644 --- a/spike_main/disasm.cc +++ b/spike_main/disasm.cc @@ -849,6 +849,20 @@ disassembler_t::disassembler_t(int xlen) add_insn(new disasm_insn_t(#name ".vx", match_##name##_vx, mask_##name##_vx, \ {&vd, &vs2, &xrs1, &opt, &vm})); + #define DISASM_OPIV_VXIM_INSN(name, sign) \ + add_insn(new disasm_insn_t(#name ".vvm", match_##name##_vvm, mask_##name##_vvm, \ + {&vd, &vs2, &vs1, &v0})); \ + add_insn(new disasm_insn_t(#name ".vxm", match_##name##_vxm, mask_##name##_vxm, \ + {&vd, &vs2, &xrs1, &v0})); \ + add_insn(new disasm_insn_t(#name ".vim", match_##name##_vim, mask_##name##_vim, \ + {&vd, &vs2, &v_simm5, &v0})); + + #define DISASM_OPIV_VX_M_INSN(name, sign) \ + add_insn(new disasm_insn_t(#name ".vvm", match_##name##_vvm, mask_##name##_vvm, \ + {&vd, &vs2, &vs1, &v0})); \ + add_insn(new disasm_insn_t(#name ".vxm", match_##name##_vxm, mask_##name##_vxm, \ + {&vd, &vs2, &xrs1, &v0})); + //OPFVV/OPFVF //0b00_0000 DISASM_OPIV_VXI_INSN(vadd, 1); @@ -866,11 +880,11 @@ disassembler_t::disassembler_t(int xlen) DISASM_OPIV__XI_INSN(vslidedown,1); //0b01_0000 - DISASM_OPIV_VXI_INSN(vadc, 1); - DISASM_OPIV_VX__INSN(vsbc, 1); - DISASM_INSN("vmerge.vim", vmerge_vim, 0, {&vd, &vs2, &v_simm5, &v0}); - DISASM_INSN("vmerge.vvm", vmerge_vvm, 0, {&vd, &vs2, &vs1, &v0}); - DISASM_INSN("vmerge.vxm", vmerge_vxm, 0, {&vd, &vs2, &xrs1, &v0}); + DISASM_OPIV_VXIM_INSN(vadc, 1); + DISASM_OPIV_VXIM_INSN(vmadc, 1); + DISASM_OPIV_VX_M_INSN(vsbc, 1); + DISASM_OPIV_VX_M_INSN(vmsbc, 1); + DISASM_OPIV_VXIM_INSN(vmerge, 1); DISASM_INSN("vmv.v.i", vmv_v_i, 0, {&vd, &v_simm5}); DISASM_INSN("vmv.v.v", vmv_v_v, 0, {&vd, &vs1}); DISASM_INSN("vmv.v.x", vmv_v_x, 0, {&vd, &xrs1}); @@ -986,6 +1000,8 @@ disassembler_t::disassembler_t(int xlen) #undef DISASM_OPIV_W___INSN #undef DISASM_OPIV_M___INSN #undef DISASM_OPIV__X__INSN + #undef DISASM_OPIV_VXIM_INSN + #undef DISASM_OPIV_VX_M_INSN #define DISASM_OPIV_VF_INSN(name) \ add_insn(new disasm_insn_t(#name ".vv", match_##name##_vv, mask_##name##_vv, \ |