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author | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-05-24 21:57:26 -0700 |
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committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-05-24 23:13:17 -0700 |
commit | a878edfef23ca7deb3c0698e8c9b1d674ba86cf0 (patch) | |
tree | dedf4ed8b05faae8cef82dc8497c786bc2e712e9 /riscv/insns/vfncvt_rod_f_f_w.h | |
parent | a5a5ea054644311953da76e6d7614b0473a1c218 (diff) | |
download | spike-a878edfef23ca7deb3c0698e8c9b1d674ba86cf0.zip spike-a878edfef23ca7deb3c0698e8c9b1d674ba86cf0.tar.gz spike-a878edfef23ca7deb3c0698e8c9b1d674ba86cf0.tar.bz2 |
rvv: support [u]i8 type
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Diffstat (limited to 'riscv/insns/vfncvt_rod_f_f_w.h')
-rw-r--r-- | riscv/insns/vfncvt_rod_f_f_w.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/riscv/insns/vfncvt_rod_f_f_w.h b/riscv/insns/vfncvt_rod_f_f_w.h index 864b784..bb0b851 100644 --- a/riscv/insns/vfncvt_rod_f_f_w.h +++ b/riscv/insns/vfncvt_rod_f_f_w.h @@ -1,6 +1,9 @@ // vfncvt.rod.f.f.v vd, vs2, vm VI_VFP_CVT_SCALE ({ + require(0); +}, +{ softfloat_roundingMode = softfloat_round_odd; auto vs2 = P.VU.elt<float32_t>(rs2_num, i); P.VU.elt<float16_t>(rd_num, i, true) = f32_to_f16(vs2); |